I/O pads may include ESD protection and other circuitry. See Analog-VLSI Open-IP Chapter 2 for circuit diagrams and further details (in Japanese).
VSS/VDD are intended for the analog core of the chip. VSS is normally also the substrate connection.PVSS
VSS0/VDD0 are intended for digital peripheral circuitry.PVSS0
VSS1/VDD1 are intended for the digital core of the chip.PVSS1
VSSE/VDDE are intended for analog peripheral circuitry.PVSSE
PATH is an ESD-protected.pad intended for low impedance analog I/O.PATH
PATHR is an ESD-protected.pad with a series resistor intended for high impedance analog input.PATHR
PDIN is an ESD-protected.pad with a CMOS input buffer.PDIN
PDOUT is an ESD-protected.pad with a CMOS output buffer.PDOUT
PDTH is an ESD-protected.pad intended for specialized digital ouputs such as LVDS .PDTH
PDTHR is an ESD-protected.pad with a series resistor intended for specialized digital inputs such as LVDS .PDTHR
TROUT is an ESD-protected.pad with a tri-state CMOS output buffer.TROUT
PAD is a pad without any additional circuitry.PAD
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