v 20060123 1
T 100 100 0 1 0 0 0 0 1
gedasymbols::url=http://www.gedasymbols.org/user/stephen_trier/A3PN250.bank2.sym
B 300 300 5000 4000 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 5300 4400 9 10 0 0 0 0 1
footprint=Actel-VQ100
T 5300 4600 9 10 0 0 0 0 1
description=Microsemi SOC A3PN250 FPGA, I/O bank 2
T 5300 4800 9 10 0 0 0 0 1
device=A3PN250
T 5300 5000 9 10 0 0 0 0 1
dist-license=GPL
T 5300 5200 9 10 0 0 0 0 1
use-license=unlimited
T 5300 5400 9 10 0 0 0 0 1
author=Stephen Trier, sct@skywired.net
T 5300 5600 9 10 0 0 0 0 1
copyright=2010 Stephen Trier
T 2800 2900 9 10 1 1 0 3 1
I/O Bank 2
T 2800 3300 9 10 1 1 0 3 1
A3PN250 (VQ100)
T 2800 3700 9 10 1 1 0 3 1
refdes=U?
P 5600 3900 5300 3900 1 0 0
{
T 5250 3900 9 10 1 1 0 7 1
pinlabel=GEA2/IO50RSB2
T 5400 3950 5 8 1 1 0 0 1
pinnumber=26
T 5400 3950 5 8 0 1 0 0 1
pinseq=26
}
P 5600 3700 5300 3700 1 0 0
{
T 5250 3700 9 10 1 1 0 7 1
pinlabel=GEB2/IO49RSB2
T 5400 3750 5 8 1 1 0 0 1
pinnumber=27
T 5400 3750 5 8 0 1 0 0 1
pinseq=27
}
P 5600 3500 5300 3500 1 0 0
{
T 5250 3500 9 10 1 1 0 7 1
pinlabel=GEC2/IO48RSB2
T 5400 3550 5 8 1 1 0 0 1
pinnumber=28
T 5400 3550 5 8 0 1 0 0 1
pinseq=28
}
P 5600 3300 5300 3300 1 0 0
{
T 5250 3300 9 10 1 1 0 7 1
pinlabel=IO47RSB2
T 5400 3350 5 8 1 1 0 0 1
pinnumber=29
T 5400 3350 5 8 0 1 0 0 1
pinseq=29
}
P 5600 3100 5300 3100 1 0 0
{
T 5250 3100 9 10 1 1 0 7 1
pinlabel=IO46RSB2
T 5400 3150 5 8 1 1 0 0 1
pinnumber=30
T 5400 3150 5 8 0 1 0 0 1
pinseq=30
}
P 5600 2900 5300 2900 1 0 0
{
T 5250 2900 9 10 1 1 0 7 1
pinlabel=IO45RSB2
T 5400 2950 5 8 1 1 0 0 1
pinnumber=31
T 5400 2950 5 8 0 1 0 0 1
pinseq=31
}
P 5600 2700 5300 2700 1 0 0
{
T 5250 2700 9 10 1 1 0 7 1
pinlabel=IO44RSB2
T 5400 2750 5 8 1 1 0 0 1
pinnumber=32
T 5400 2750 5 8 0 1 0 0 1
pinseq=32
}
P 5600 2500 5300 2500 1 0 0
{
T 5250 2500 9 10 1 1 0 7 1
pinlabel=IO43RSB2
T 5400 2550 5 8 1 1 0 0 1
pinnumber=33
T 5400 2550 5 8 0 1 0 0 1
pinseq=33
}
P 5600 2300 5300 2300 1 0 0
{
T 5250 2300 9 10 1 1 0 7 1
pinlabel=IO42RSB2
T 5400 2350 5 8 1 1 0 0 1
pinnumber=34
T 5400 2350 5 8 0 1 0 0 1
pinseq=34
}
P 5600 2100 5300 2100 1 0 0
{
T 5250 2100 9 10 1 1 0 7 1
pinlabel=IO41RSB2
T 5400 2150 5 8 1 1 0 0 1
pinnumber=35
T 5400 2150 5 8 0 1 0 0 1
pinseq=35
}
P 5600 1900 5300 1900 1 0 0
{
T 5250 1900 9 10 1 1 0 7 1
pinlabel=IO40RSB2
T 5400 1950 5 8 1 1 0 0 1
pinnumber=36
T 5400 1950 5 8 0 1 0 0 1
pinseq=36
}
P 0 3900 300 3900 1 0 0
{
T 350 3900 9 10 1 1 0 1 1
pinlabel=VCCIB2
T 200 3950 5 8 1 1 0 6 1
pinnumber=39
T 200 3950 5 8 0 1 0 6 1
pinseq=39
}
P 5600 1700 5300 1700 1 0 0
{
T 5250 1700 9 10 1 1 0 7 1
pinlabel=IO39RSB2
T 5400 1750 5 8 1 1 0 0 1
pinnumber=40
T 5400 1750 5 8 0 1 0 0 1
pinseq=40
}
P 5600 1500 5300 1500 1 0 0
{
T 5250 1500 9 10 1 1 0 7 1
pinlabel=IO38RSB2
T 5400 1550 5 8 1 1 0 0 1
pinnumber=41
T 5400 1550 5 8 0 1 0 0 1
pinseq=41
}
P 5600 1300 5300 1300 1 0 0
{
T 5250 1300 9 10 1 1 0 7 1
pinlabel=IO37RSB2
T 5400 1350 5 8 1 1 0 0 1
pinnumber=42
T 5400 1350 5 8 0 1 0 0 1
pinseq=42
}
P 5600 1100 5300 1100 1 0 0
{
T 5250 1100 9 10 1 1 0 7 1
pinlabel=GDC2/IO36RSB2
T 5400 1150 5 8 1 1 0 0 1
pinnumber=43
T 5400 1150 5 8 0 1 0 0 1
pinseq=43
}
P 5600 900 5300 900 1 0 0
{
T 5250 900 9 10 1 1 0 7 1
pinlabel=GDB2/IO35RSB2
T 5400 950 5 8 1 1 0 0 1
pinnumber=44
T 5400 950 5 8 0 1 0 0 1
pinseq=44
}
P 5600 700 5300 700 1 0 0
{
T 5250 700 9 10 1 1 0 7 1
pinlabel=GDA2/IO34RSB2
T 5400 750 5 8 1 1 0 0 1
pinnumber=45
T 5400 750 5 8 0 1 0 0 1
pinseq=45
}
P 0 3500 300 3500 1 0 0
{
T 350 3500 9 10 1 1 0 1 1
pinlabel=VMV2
T 200 3550 5 8 1 1 0 6 1
pinnumber=50
T 200 3550 5 8 0 1 0 6 1
pinseq=50
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