v 20060113 1
P 0 2000 300 2000 1 0 0
{
T 200 2050 5 8 1 1 0 6 1
pinnumber=1
T 200 1950 5 8 0 1 0 8 1
pinseq=1
T 350 2000 9 8 1 1 0 0 1
pinlabel=1A
T 350 2000 5 8 0 1 0 2 1
pintype=in
}
P 0 1700 300 1700 1 0 0
{
T 200 1750 5 8 1 1 0 6 1
pinnumber=2
T 200 1650 5 8 0 1 0 8 1
pinseq=2
T 350 1700 9 8 1 1 0 0 1
pinlabel=1B
T 350 1700 5 8 0 1 0 2 1
pintype=in
}
P 0 1400 300 1400 1 0 0
{
T 200 1450 5 8 1 1 0 6 1
pinnumber=3
T 200 1350 5 8 0 1 0 8 1
pinseq=3
T 350 1400 9 8 1 1 0 0 1
pinlabel=1Y
T 350 1400 5 8 0 1 0 2 1
pintype=out
}
P 0 1100 300 1100 1 0 0
{
T 200 1150 5 8 1 1 0 6 1
pinnumber=4
T 200 1050 5 8 0 1 0 8 1
pinseq=4
T 350 1100 9 8 1 1 0 0 1
pinlabel=2A
T 350 1100 5 8 0 1 0 2 1
pintype=in
}
P 0 800 300 800 1 0 0
{
T 200 850 5 8 1 1 0 6 1
pinnumber=5
T 200 750 5 8 0 1 0 8 1
pinseq=5
T 350 800 9 8 1 1 0 0 1
pinlabel=2B
T 350 800 5 8 0 1 0 2 1
pintype=in
}
P 0 500 300 500 1 0 0
{
T 200 550 5 8 1 1 0 6 1
pinnumber=6
T 200 450 5 8 0 1 0 8 1
pinseq=6
T 350 500 9 8 1 1 0 0 1
pinlabel=2Y
T 350 500 5 8 0 1 0 2 1
pintype=out
}
P 0 200 300 200 1 0 0
{
T 200 250 5 8 1 1 0 6 1
pinnumber=7
T 200 150 5 8 0 1 0 8 1
pinseq=7
T 350 200 9 8 1 1 0 0 1
pinlabel=GND
T 350 200 5 8 0 1 0 2 1
pintype=pwr
}
P 1500 2000 1200 2000 1 0 0
{
T 1300 2050 5 8 1 1 0 0 1
pinnumber=14
T 1300 1950 5 8 0 1 0 2 1
pinseq=8
T 1150 2000 9 8 1 1 0 6 1
pinlabel=Vcc
T 1150 2000 5 8 0 1 0 8 1
pintype=pwr
}
P 1500 1700 1200 1700 1 0 0
{
T 1300 1750 5 8 1 1 0 0 1
pinnumber=13
T 1300 1650 5 8 0 1 0 2 1
pinseq=9
T 1150 1700 9 8 1 1 0 6 1
pinlabel=4B
T 1150 1700 5 8 0 1 0 8 1
pintype=in
}
P 1500 1400 1200 1400 1 0 0
{
T 1300 1450 5 8 1 1 0 0 1
pinnumber=12
T 1300 1350 5 8 0 1 0 2 1
pinseq=10
T 1150 1400 9 8 1 1 0 6 1
pinlabel=4A
T 1150 1400 5 8 0 1 0 8 1
pintype=in
}
P 1500 1100 1200 1100 1 0 0
{
T 1300 1150 5 8 1 1 0 0 1
pinnumber=11
T 1300 1050 5 8 0 1 0 2 1
pinseq=11
T 1150 1100 9 8 1 1 0 6 1
pinlabel=4Y
T 1150 1100 5 8 0 1 0 8 1
pintype=out
}
P 1500 800 1200 800 1 0 0
{
T 1300 850 5 8 1 1 0 0 1
pinnumber=10
T 1300 750 5 8 0 1 0 2 1
pinseq=12
T 1150 800 9 8 1 1 0 6 1
pinlabel=3B
T 1150 800 5 8 0 1 0 8 1
pintype=in
}
P 1500 500 1200 500 1 0 0
{
T 1300 550 5 8 1 1 0 0 1
pinnumber=9
T 1300 450 5 8 0 1 0 2 1
pinseq=13
T 1150 500 9 8 1 1 0 6 1
pinlabel=3A
T 1150 500 5 8 0 1 0 8 1
pintype=in
}
P 1500 200 1200 200 1 0 0
{
T 1300 250 5 8 1 1 0 0 1
pinnumber=8
T 1300 150 5 8 0 1 0 2 1
pinseq=14
T 1150 200 9 8 1 1 0 6 1
pinlabel=3Y
T 1150 200 5 8 0 1 0 8 1
pintype=out
}
B 300 0 900 2300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 1200 2400 8 10 1 1 0 6 1
refdes=U?
T 300 2400 9 10 1 0 0 0 1
7486
T 300 2600 5 10 0 0 0 0 1
device=74HCT86
T 300 2800 5 10 0 0 0 0 1
footprint=SO14
T 300 3000 5 10 0 0 0 0 1
author=Stefan Tauner
T 300 3200 5 10 0 0 0 0 1
documentation=http://www.ti.com/lit/gpn/cd74hct86
T 300 3400 5 10 0 0 0 0 1
description=Quad 2-Input EXCLUSIVE-OR Gate (4x2XOR)
T 300 3600 5 10 0 0 0 0 1
numslots=0
T 300 3800 5 10 0 0 0 0 1
dist-license=GPLv3, see http://www.gnu.org/licenses/gpl-3.0.txt
T 300 4000 5 10 0 0 0 0 1
use-license=unlimited