# This is the template file for creating symbols with tragesym
# every line starting with '#' is a comment line.

[options]
# wordswap swaps labels if the pin is on the right side an looks like this:
#   "PB1 (CLK)". That's useful for micro controller port labels
# rotate_labels rotates the pintext of top and bottom pins
#   this is useful for large symbols like FPGAs with more than 100 pins
# sort_labels will sort the pins by it's labels
#   useful for address ports, busses, ...
wordswap=yes
rotate_labels=no
sort_labels=no
generate_pinseq=yes
sym_width=900
pinwidthvertical=300
pinwidthhorizontal=300

[geda_attr]
# name will be printed in the top of the symbol
# name is only some graphical text, not an attribute
# version specifies a gschem version.
# if you have a device with slots, you'll have to use slot= and slotdef=
# use comment= if there are special information you want to add
version=20060113 1
name=7486
device=74HCT86
refdes=U?
footprint=SO14
description=Quad 2-Input EXCLUSIVE-OR Gate (4x2XOR)
documentation=http://www.ti.com/lit/gpn/cd74hct86
author=Stefan Tauner
dist-license=GPLv3, see http://www.gnu.org/licenses/gpl-3.0.txt
use-license=unlimited
numslots=0
#slot=1
#slotdef=1:
#slotdef=2:
#slotdef=3:
#slotdef=4:
#comment=
#comment=
#comment=

[pins]
# tabseparated list of pin descriptions
# ----------------------------------------
# pinnr is the physical number of the pin
# seq is the pinseq= attribute, leave it blank if it doesn't matter
# type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr)
# style can be (line,dot,clk,dotclk,none). none if only want to add a net
# posit. can be (l,r,t,b) or empty for nets
# net specifies the name of the net. Vcc or GND for example.
# label represents the pinlabel.
#	negation lines can be added with "\_" example: \_enable\_ 
#	if you want to write a "\" use "\\" as escape sequence
#-----------------------------------------------------
#pinnr	seq	type	style	posit.	net	label	
#-----------------------------------------------------
1		in	line	l		1A
2		in	line	l		1B
3		out	line	l		1Y
4		in	line	l		2A
5		in	line	l		2B
6		out	line	l		2Y
7		pwr	line	l		GND

14		pwr	line	r		Vcc
13		in	line	r		4B
12		in	line	r		4A
11		out	line	r		4Y
10		in	line	r		3B
9		in	line	r		3A
8		out	line	r		3Y