v 20100804 1 T 100 100 0 1 0 0 0 0 1 gedasymbols::url=http://www.gedasymbols.org/user/stefan_tauner/symbols/AVR/ATmega32U2.sym P 0 5000 300 5000 1 0 0 { T 200 5050 5 8 1 1 0 6 1 pinnumber=1 T 200 4950 5 8 0 1 0 8 1 pinseq=1 T 350 5000 9 8 1 1 0 0 1 pinlabel=XTAL1 T 350 5000 5 8 0 1 0 2 1 pintype=io } P 0 4700 300 4700 1 0 0 { T 200 4750 5 8 1 1 0 6 1 pinnumber=2 T 200 4650 5 8 0 1 0 8 1 pinseq=2 T 350 4700 9 8 1 1 0 0 1 pinlabel=PC0 (XTAL2) T 350 4700 5 8 0 1 0 2 1 pintype=io } P 0 4400 300 4400 1 0 0 { T 200 4450 5 8 1 1 0 6 1 pinnumber=24 T 200 4350 5 8 0 1 0 8 1 pinseq=3 T 350 4400 9 8 1 1 0 0 1 pinlabel=PC1 (\_Reset\_, dW) T 350 4400 5 8 0 1 0 2 1 pintype=io } P 0 4100 300 4100 1 0 0 { T 200 4150 5 8 1 1 0 6 1 pinnumber=5 T 200 4050 5 8 0 1 0 8 1 pinseq=4 T 350 4100 9 8 1 1 0 0 1 pinlabel=PC2 (PCINT11, AIN2) T 350 4100 5 8 0 1 0 2 1 pintype=io } P 0 3800 300 3800 1 0 0 { T 200 3850 5 8 1 1 0 6 1 pinnumber=26 T 200 3750 5 8 0 1 0 8 1 pinseq=5 T 350 3800 9 8 1 1 0 0 1 pinlabel=PC4 (PCINT10) T 350 3800 5 8 0 1 0 2 1 pintype=io } P 0 3500 300 3500 1 0 0 { T 200 3550 5 8 1 1 0 6 1 pinnumber=25 T 200 3450 5 8 0 1 0 8 1 pinseq=6 T 350 3500 9 8 1 1 0 0 1 pinlabel=PC5 (PCINT9, OC1B) T 350 3500 5 8 0 1 0 2 1 pintype=io } P 0 3200 300 3200 1 0 0 { T 200 3250 5 8 1 1 0 6 1 pinnumber=23 T 200 3150 5 8 0 1 0 8 1 pinseq=7 T 350 3200 9 8 1 1 0 0 1 pinlabel=PC6 (PCINT8, OC1A) T 350 3200 5 8 0 1 0 2 1 pintype=io } P 0 2900 300 2900 1 0 0 { T 200 2950 5 8 1 1 0 6 1 pinnumber=22 T 200 2850 5 8 0 1 0 8 1 pinseq=8 T 350 2900 9 8 1 1 0 0 1 pinlabel=PC7 (INT4, ICP1, CLKO) T 350 2900 5 8 0 1 0 2 1 pintype=io } P 0 2300 300 2300 1 0 0 { T 200 2350 5 8 1 1 0 6 1 pinnumber=27 T 200 2250 5 8 0 1 0 8 1 pinseq=9 T 350 2300 9 8 1 1 0 0 1 pinlabel=UCAP T 350 2300 5 8 0 1 0 2 1 pintype=pwr } P 0 2000 300 2000 1 0 0 { T 200 2050 5 8 1 1 0 6 1 pinnumber=28 T 200 1950 5 8 0 1 0 8 1 pinseq=10 T 350 2000 9 8 1 1 0 0 1 pinlabel=UGND T 350 2000 5 8 0 1 0 2 1 pintype=pwr } P 0 1700 300 1700 1 0 0 { T 200 1750 5 8 1 1 0 6 1 pinnumber=30 T 200 1650 5 8 0 1 0 8 1 pinseq=11 T 350 1700 9 8 1 1 0 0 1 pinlabel=D- T 350 1700 5 8 0 1 0 2 1 pintype=io } P 0 1400 300 1400 1 0 0 { T 200 1450 5 8 1 1 0 6 1 pinnumber=29 T 200 1350 5 8 0 1 0 8 1 pinseq=12 T 350 1400 9 8 1 1 0 0 1 pinlabel=D+ T 350 1400 5 8 0 1 0 2 1 pintype=io } P 0 1100 300 1100 1 0 0 { T 200 1150 5 8 1 1 0 6 1 pinnumber=31 T 200 1050 5 8 0 1 0 8 1 pinseq=13 T 350 1100 9 8 1 1 0 0 1 pinlabel=UVCC T 350 1100 5 8 0 1 0 2 1 pintype=pwr } P 0 800 300 800 1 0 0 { T 200 850 5 8 1 1 0 6 1 pinnumber=4 T 200 750 5 8 0 1 0 8 1 pinseq=14 T 350 800 9 8 1 1 0 0 1 pinlabel=VCC T 350 800 5 8 0 1 0 2 1 pintype=pwr } P 0 500 300 500 1 0 0 { T 200 550 5 8 1 1 0 6 1 pinnumber=32 T 200 450 5 8 0 1 0 8 1 pinseq=15 T 350 500 9 8 1 1 0 0 1 pinlabel=AVCC T 350 500 5 8 0 1 0 2 1 pintype=pwr } P 0 200 300 200 1 0 0 { T 200 250 5 8 1 1 0 6 1 pinnumber=3 T 200 150 5 8 0 1 0 8 1 pinseq=16 T 350 200 9 8 1 1 0 0 1 pinlabel=GND T 350 200 5 8 0 1 0 2 1 pintype=pwr } P 4600 5000 4300 5000 1 0 0 { T 4400 5050 5 8 1 1 0 0 1 pinnumber=6 T 4400 4950 5 8 0 1 0 2 1 pinseq=17 T 4250 5000 9 8 1 1 0 6 1 pinlabel=(OC0B, INT0) PD0 T 4250 5000 5 8 0 1 0 8 1 pintype=io } P 4600 4700 4300 4700 1 0 0 { T 4400 4750 5 8 1 1 0 0 1 pinnumber=7 T 4400 4650 5 8 0 1 0 2 1 pinseq=18 T 4250 4700 9 8 1 1 0 6 1 pinlabel=(AIN0, INT1) PD1 T 4250 4700 5 8 0 1 0 8 1 pintype=io } P 4600 4400 4300 4400 1 0 0 { T 4400 4450 5 8 1 1 0 0 1 pinnumber=8 T 4400 4350 5 8 0 1 0 2 1 pinseq=19 T 4250 4400 9 8 1 1 0 6 1 pinlabel=(RXD1, AIN1, INT2) PD2 T 4250 4400 5 8 0 1 0 8 1 pintype=io } P 4600 4100 4300 4100 1 0 0 { T 4400 4150 5 8 1 1 0 0 1 pinnumber=9 T 4400 4050 5 8 0 1 0 2 1 pinseq=20 T 4250 4100 9 8 1 1 0 6 1 pinlabel=(TXD1, INT3) PD3 T 4250 4100 5 8 0 1 0 8 1 pintype=io } P 4600 3800 4300 3800 1 0 0 { T 4400 3850 5 8 1 1 0 0 1 pinnumber=10 T 4400 3750 5 8 0 1 0 2 1 pinseq=21 T 4250 3800 9 8 1 1 0 6 1 pinlabel=(AIN3, INT5) PD4 T 4250 3800 5 8 0 1 0 8 1 pintype=io } P 4600 3500 4300 3500 1 0 0 { T 4400 3550 5 8 1 1 0 0 1 pinnumber=11 T 4400 3450 5 8 0 1 0 2 1 pinseq=22 T 4250 3500 9 8 1 1 0 6 1 pinlabel=(XCK, AIN4, PCINT12) PD5 T 4250 3500 5 8 0 1 0 8 1 pintype=io } P 4600 3200 4300 3200 1 0 0 { T 4400 3250 5 8 1 1 0 0 1 pinnumber=12 T 4400 3150 5 8 0 1 0 2 1 pinseq=23 T 4250 3200 9 8 1 1 0 6 1 pinlabel=(\_RTS\_, AIN5, INT6) PD6 T 4250 3200 5 8 0 1 0 8 1 pintype=io } P 4600 2900 4300 2900 1 0 0 { T 4400 2950 5 8 1 1 0 0 1 pinnumber=13 T 4400 2850 5 8 0 1 0 2 1 pinseq=24 T 4250 2900 9 8 1 1 0 6 1 pinlabel=(\_HWB\_, T0, \_CTS\_, AIN6, INT7) PD7 T 4250 2900 5 8 0 1 0 8 1 pintype=io } P 4600 2300 4300 2300 1 0 0 { T 4400 2350 5 8 1 1 0 0 1 pinnumber=14 T 4400 2250 5 8 0 1 0 2 1 pinseq=25 T 4250 2300 9 8 1 1 0 6 1 pinlabel=(\_SS\_, PCINT0) PB0 T 4250 2300 5 8 0 1 0 8 1 pintype=io } P 4600 2000 4300 2000 1 0 0 { T 4400 2050 5 8 1 1 0 0 1 pinnumber=15 T 4400 1950 5 8 0 1 0 2 1 pinseq=26 T 4250 2000 9 8 1 1 0 6 1 pinlabel=(SCLK, PCINT1) PB1 T 4250 2000 5 8 0 1 0 8 1 pintype=io } P 4600 1700 4300 1700 1 0 0 { T 4400 1750 5 8 1 1 0 0 1 pinnumber=16 T 4400 1650 5 8 0 1 0 2 1 pinseq=27 T 4250 1700 9 8 1 1 0 6 1 pinlabel=(PDI, MOSI, PCINT2) PB2 T 4250 1700 5 8 0 1 0 8 1 pintype=io } P 4600 1400 4300 1400 1 0 0 { T 4400 1450 5 8 1 1 0 0 1 pinnumber=17 T 4400 1350 5 8 0 1 0 2 1 pinseq=28 T 4250 1400 9 8 1 1 0 6 1 pinlabel=(PDO, MISO, PCINT3) PB3 T 4250 1400 5 8 0 1 0 8 1 pintype=io } P 4600 1100 4300 1100 1 0 0 { T 4400 1150 5 8 1 1 0 0 1 pinnumber=18 T 4400 1050 5 8 0 1 0 2 1 pinseq=29 T 4250 1100 9 8 1 1 0 6 1 pinlabel=(T1, PCINT4) PB4 T 4250 1100 5 8 0 1 0 8 1 pintype=io } P 4600 800 4300 800 1 0 0 { T 4400 850 5 8 1 1 0 0 1 pinnumber=19 T 4400 750 5 8 0 1 0 2 1 pinseq=30 T 4250 800 9 8 1 1 0 6 1 pinlabel=(PCINT5) PB5 T 4250 800 5 8 0 1 0 8 1 pintype=io } P 4600 500 4300 500 1 0 0 { T 4400 550 5 8 1 1 0 0 1 pinnumber=20 T 4400 450 5 8 0 1 0 2 1 pinseq=31 T 4250 500 9 8 1 1 0 6 1 pinlabel=(PCINT6) PB6 T 4250 500 5 8 0 1 0 8 1 pintype=io } P 4600 200 4300 200 1 0 0 { T 4400 250 5 8 1 1 0 0 1 pinnumber=21 T 4400 150 5 8 0 1 0 2 1 pinseq=32 T 4250 200 9 8 1 1 0 6 1 pinlabel=(OC0A, OC1C, PCINT7) PB7 T 4250 200 5 8 0 1 0 8 1 pintype=io } B 300 0 4000 5300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 4300 5400 8 10 1 1 0 6 1 refdes=U? T 300 5400 9 10 1 0 0 0 1 ATmega32U2 T 300 5600 5 10 0 0 0 0 1 device=ATmega32U2 T 300 5800 5 10 0 0 0 0 1 footprint=TQFP32_7 T 300 6000 5 10 0 0 0 0 1 author=Martin Kunz T 300 6200 5 10 0 0 0 0 1 documentation=http://atmel.com/dyn/resources/prod_documents/doc7799.pdf T 300 6400 5 10 0 0 0 0 1 description=ATmega32U2/ATmega16U2/ATmega8U2 T 300 6600 5 10 0 0 0 0 1 numslots=0 T 300 6800 5 10 0 0 0 0 1 dist-license=unlimited T 300 7000 5 10 0 0 0 0 1 use-license=unlimited T 300 7200 5 10 0 0 0 0 1 comment=available footprints are: TQFP32_7, QFN32_7_EP