v 20081231 1 P 0 8000 300 8000 1 0 0 { T 200 8050 5 8 1 1 0 6 1 pinnumber=2 T 200 7950 5 8 0 1 0 8 1 pinseq=1 T 350 8000 9 8 1 1 0 0 1 pinlabel=IO_L01P T 350 8000 5 8 0 1 0 2 1 pintype=io } P 0 7800 300 7800 1 0 0 { T 200 7850 5 8 1 1 0 6 1 pinnumber=3 T 200 7750 5 8 0 1 0 8 1 pinseq=2 T 350 7800 9 8 1 1 0 0 1 pinlabel=IO_L01N T 350 7800 5 8 0 1 0 2 1 pintype=io } P 0 7600 300 7600 1 0 0 { T 200 7650 5 8 1 1 0 6 1 pinnumber=4 T 200 7550 5 8 0 1 0 8 1 pinseq=3 T 350 7600 9 8 1 1 0 0 1 pinlabel=IO_L02P T 350 7600 5 8 0 1 0 2 1 pintype=io } P 0 7400 300 7400 1 0 0 { T 200 7450 5 8 1 1 0 6 1 pinnumber=5 T 200 7350 5 8 0 1 0 8 1 pinseq=4 T 350 7400 9 8 1 1 0 0 1 pinlabel=IO_L02N/VREF T 350 7400 5 8 0 1 0 2 1 pintype=io } P 0 7200 300 7200 1 0 0 { T 200 7250 5 8 1 1 0 6 1 pinnumber=6 T 200 7150 5 8 0 1 0 8 1 pinseq=5 T 350 7200 9 8 1 1 0 0 1 pinlabel=IP T 350 7200 5 8 0 1 0 2 1 pintype=in } P 0 7000 300 7000 1 0 0 { T 200 7050 5 8 1 1 0 6 1 pinnumber=8 T 200 6950 5 8 0 1 0 8 1 pinseq=6 T 350 7000 9 8 1 1 0 0 1 pinlabel=IO_L03P T 350 7000 5 8 0 1 0 2 1 pintype=io } P 0 6800 300 6800 1 0 0 { T 200 6850 5 8 1 1 0 6 1 pinnumber=9 T 200 6750 5 8 0 1 0 8 1 pinseq=7 T 350 6800 9 8 1 1 0 0 1 pinlabel=IO_L03N T 350 6800 5 8 0 1 0 2 1 pintype=io } P 0 6600 300 6600 1 0 0 { T 200 6650 5 8 1 1 0 6 1 pinnumber=11 T 200 6550 5 8 0 1 0 8 1 pinseq=8 T 350 6600 9 8 1 1 0 0 1 pinlabel=IO_L04P T 350 6600 5 8 0 1 0 2 1 pintype=io } P 0 6400 300 6400 1 0 0 { T 200 6450 5 8 1 1 0 6 1 pinnumber=12 T 200 6350 5 8 0 1 0 8 1 pinseq=9 T 350 6400 9 8 1 1 0 0 1 pinlabel=IO_L04N T 350 6400 5 8 0 1 0 2 1 pintype=io } P 0 6200 300 6200 1 0 0 { T 200 6250 5 8 1 1 0 6 1 pinnumber=14 T 200 6150 5 8 0 1 0 8 1 pinseq=10 T 350 6200 9 8 1 1 0 0 1 pinlabel=IP T 350 6200 5 8 0 1 0 2 1 pintype=in } P 0 6000 300 6000 1 0 0 { T 200 6050 5 8 1 1 0 6 1 pinnumber=15 T 200 5950 5 8 0 1 0 8 1 pinseq=11 T 350 6000 9 8 1 1 0 0 1 pinlabel=IO_L05P T 350 6000 5 8 0 1 0 2 1 pintype=io } P 0 5800 300 5800 1 0 0 { T 200 5850 5 8 1 1 0 6 1 pinnumber=16 T 200 5750 5 8 0 1 0 8 1 pinseq=12 T 350 5800 9 8 1 1 0 0 1 pinlabel=IO_L05N T 350 5800 5 8 0 1 0 2 1 pintype=io } P 0 5600 300 5600 1 0 0 { T 200 5650 5 8 1 1 0 6 1 pinnumber=18 T 200 5550 5 8 0 1 0 8 1 pinseq=13 T 350 5600 9 8 1 1 0 0 1 pinlabel=IO_L06P T 350 5600 5 8 0 1 0 2 1 pintype=io } P 0 5400 300 5400 1 0 0 { T 200 5450 5 8 1 1 0 6 1 pinnumber=19 T 200 5350 5 8 0 1 0 8 1 pinseq=14 T 350 5400 9 8 1 1 0 0 1 pinlabel=IO_L06N T 350 5400 5 8 0 1 0 2 1 pintype=io } P 0 5200 300 5200 1 0 0 { T 200 5250 5 8 1 1 0 6 1 pinnumber=20 T 200 5150 5 8 0 1 0 8 1 pinseq=15 T 350 5200 9 8 1 1 0 0 1 pinlabel=IP/VREF T 350 5200 5 8 0 1 0 2 1 pintype=in } P 0 5000 300 5000 1 0 0 { T 200 5050 5 8 1 1 0 6 1 pinnumber=22 T 200 4950 5 8 0 1 0 8 1 pinseq=16 T 350 5000 9 8 1 1 0 0 1 pinlabel=IO_L07P/LHCLK0 T 350 5000 5 8 0 1 0 2 1 pintype=io } P 0 4800 300 4800 1 0 0 { T 200 4850 5 8 1 1 0 6 1 pinnumber=23 T 200 4750 5 8 0 1 0 8 1 pinseq=17 T 350 4800 9 8 1 1 0 0 1 pinlabel=IO_L07N/LHCLK1 T 350 4800 5 8 0 1 0 2 1 pintype=io } P 0 4600 300 4600 1 0 0 { T 200 4650 5 8 1 1 0 6 1 pinnumber=24 T 200 4550 5 8 0 1 0 8 1 pinseq=18 T 350 4600 9 8 1 1 0 0 1 pinlabel=IO_L08P/LHCLK2 T 350 4600 5 8 0 1 0 2 1 pintype=io } P 0 4400 300 4400 1 0 0 { T 200 4450 5 8 1 1 0 6 1 pinnumber=25 T 200 4350 5 8 0 1 0 8 1 pinseq=19 T 350 4400 9 8 1 1 0 0 1 pinlabel=IO_L08N/LHCLK3/IRDY2 T 350 4400 5 8 0 1 0 2 1 pintype=io } P 0 4200 300 4200 1 0 0 { T 200 4250 5 8 1 1 0 6 1 pinnumber=26 T 200 4150 5 8 0 1 0 8 1 pinseq=20 T 350 4200 9 8 1 1 0 0 1 pinlabel=IP T 350 4200 5 8 0 1 0 2 1 pintype=in } P 0 4000 300 4000 1 0 0 { T 200 4050 5 8 1 1 0 6 1 pinnumber=28 T 200 3950 5 8 0 1 0 8 1 pinseq=21 T 350 4000 9 8 1 1 0 0 1 pinlabel=IO_L09P/LHCLK4/TRDY2 T 350 4000 5 8 0 1 0 2 1 pintype=io } P 0 3800 300 3800 1 0 0 { T 200 3850 5 8 1 1 0 6 1 pinnumber=29 T 200 3750 5 8 0 1 0 8 1 pinseq=22 T 350 3800 9 8 1 1 0 0 1 pinlabel=IO_L09N/LHCLK5 T 350 3800 5 8 0 1 0 2 1 pintype=io } P 0 3600 300 3600 1 0 0 { T 200 3650 5 8 1 1 0 6 1 pinnumber=30 T 200 3550 5 8 0 1 0 8 1 pinseq=23 T 350 3600 9 8 1 1 0 0 1 pinlabel=IO_L10P/LHCLK6 T 350 3600 5 8 0 1 0 2 1 pintype=io } P 0 3400 300 3400 1 0 0 { T 200 3450 5 8 1 1 0 6 1 pinnumber=31 T 200 3350 5 8 0 1 0 8 1 pinseq=24 T 350 3400 9 8 1 1 0 0 1 pinlabel=IO_L10N/LHCLK7 T 350 3400 5 8 0 1 0 2 1 pintype=io } P 0 3200 300 3200 1 0 0 { T 200 3250 5 8 1 1 0 6 1 pinnumber=32 T 200 3150 5 8 0 1 0 8 1 pinseq=25 T 350 3200 9 8 1 1 0 0 1 pinlabel=IP T 350 3200 5 8 0 1 0 2 1 pintype=in } P 0 3000 300 3000 1 0 0 { T 200 3050 5 8 1 1 0 6 1 pinnumber=33 T 200 2950 5 8 0 1 0 8 1 pinseq=26 T 350 3000 9 8 1 1 0 0 1 pinlabel=IO_L11P T 350 3000 5 8 0 1 0 2 1 pintype=io } P 0 2800 300 2800 1 0 0 { T 200 2850 5 8 1 1 0 6 1 pinnumber=34 T 200 2750 5 8 0 1 0 8 1 pinseq=27 T 350 2800 9 8 1 1 0 0 1 pinlabel=IO_L11N T 350 2800 5 8 0 1 0 2 1 pintype=io } P 0 2600 300 2600 1 0 0 { T 200 2650 5 8 1 1 0 6 1 pinnumber=35 T 200 2550 5 8 0 1 0 8 1 pinseq=28 T 350 2600 9 8 1 1 0 0 1 pinlabel=IO_L12P T 350 2600 5 8 0 1 0 2 1 pintype=io } P 0 2400 300 2400 1 0 0 { T 200 2450 5 8 1 1 0 6 1 pinnumber=36 T 200 2350 5 8 0 1 0 8 1 pinseq=29 T 350 2400 9 8 1 1 0 0 1 pinlabel=IO_L12N T 350 2400 5 8 0 1 0 2 1 pintype=io } P 0 2200 300 2200 1 0 0 { T 200 2250 5 8 1 1 0 6 1 pinnumber=39 T 200 2150 5 8 0 1 0 8 1 pinseq=30 T 350 2200 9 8 1 1 0 0 1 pinlabel=IO_L13P T 350 2200 5 8 0 1 0 2 1 pintype=io } P 0 2000 300 2000 1 0 0 { T 200 2050 5 8 1 1 0 6 1 pinnumber=40 T 200 1950 5 8 0 1 0 8 1 pinseq=31 T 350 2000 9 8 1 1 0 0 1 pinlabel=IO_L13N T 350 2000 5 8 0 1 0 2 1 pintype=io } P 0 1800 300 1800 1 0 0 { T 200 1850 5 8 1 1 0 6 1 pinnumber=41 T 200 1750 5 8 0 1 0 8 1 pinseq=32 T 350 1800 9 8 1 1 0 0 1 pinlabel=IO_L14P T 350 1800 5 8 0 1 0 2 1 pintype=io } P 0 1600 300 1600 1 0 0 { T 200 1650 5 8 1 1 0 6 1 pinnumber=42 T 200 1550 5 8 0 1 0 8 1 pinseq=33 T 350 1600 9 8 1 1 0 0 1 pinlabel=IO_L14N T 350 1600 5 8 0 1 0 2 1 pintype=io } P 0 1400 300 1400 1 0 0 { T 200 1450 5 8 1 1 0 6 1 pinnumber=43 T 200 1350 5 8 0 1 0 8 1 pinseq=34 T 350 1400 9 8 1 1 0 0 1 pinlabel=IP T 350 1400 5 8 0 1 0 2 1 pintype=in } P 0 1200 300 1200 1 0 0 { T 200 1250 5 8 1 1 0 6 1 pinnumber=45 T 200 1150 5 8 0 1 0 8 1 pinseq=35 T 350 1200 9 8 1 1 0 0 1 pinlabel=IO/VREF T 350 1200 5 8 0 1 0 2 1 pintype=io } P 0 1000 300 1000 1 0 0 { T 200 1050 5 8 1 1 0 6 1 pinnumber=47 T 200 950 5 8 0 1 0 8 1 pinseq=36 T 350 1000 9 8 1 1 0 0 1 pinlabel=IO_L15P T 350 1000 5 8 0 1 0 2 1 pintype=io } P 0 800 300 800 1 0 0 { T 200 850 5 8 1 1 0 6 1 pinnumber=48 T 200 750 5 8 0 1 0 8 1 pinseq=37 T 350 800 9 8 1 1 0 0 1 pinlabel=IO_L15N T 350 800 5 8 0 1 0 2 1 pintype=io } P 0 600 300 600 1 0 0 { T 200 650 5 8 1 1 0 6 1 pinnumber=49 T 200 550 5 8 0 1 0 8 1 pinseq=38 T 350 600 9 8 1 1 0 0 1 pinlabel=IO_L16P T 350 600 5 8 0 1 0 2 1 pintype=io } P 0 400 300 400 1 0 0 { T 200 450 5 8 1 1 0 6 1 pinnumber=50 T 200 350 5 8 0 1 0 8 1 pinseq=39 T 350 400 9 8 1 1 0 0 1 pinlabel=IO_L16N T 350 400 5 8 0 1 0 2 1 pintype=io } P 0 200 300 200 1 0 0 { T 200 250 5 8 1 1 0 6 1 pinnumber=51 T 200 150 5 8 0 1 0 8 1 pinseq=40 T 350 200 9 8 1 1 0 0 1 pinlabel=IP T 350 200 5 8 0 1 0 2 1 pintype=in } B 300 0 2400 8200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 2700 8300 8 10 1 1 0 6 1 refdes=U? T 300 8500 5 10 0 0 0 0 1 device=XC3S500E-PQ208 T 300 8700 5 10 0 0 0 0 1 footprint=QFP208_28 T 300 8900 5 10 0 0 0 0 1 author=Stefan Salewski T 300 9100 5 10 0 0 0 0 1 documentation=http://www.xilinx.com/support/documentation/data_sheets/ds312.pdf T 300 9300 5 10 0 0 0 0 1 description=FPGA T 300 9500 5 10 0 0 0 0 1 numslots=0 T 300 9700 5 10 0 0 0 0 1 dist-license=GPL T 300 9900 5 10 0 0 0 0 1 use-license=unlimited T 300 10100 5 10 0 0 0 0 1 comment=generated with Python script tragesym T 1900 7900 9 10 1 0 0 0 1 Bank 3 T 300 8300 5 10 1 1 0 0 1 value=XC3S500E-PQ208