v 20081231 1 P 100 8000 400 8000 1 0 0 { T 300 8050 5 8 1 1 0 6 1 pinnumber=54 T 300 7950 5 8 0 1 0 8 1 pinseq=1 T 450 8000 9 8 1 1 0 0 1 pinlabel=IP T 450 8000 5 8 0 1 0 2 1 pintype=in } P 100 7800 400 7800 1 0 0 { T 300 7850 5 8 1 1 0 6 1 pinnumber=55 T 300 7750 5 8 0 1 0 8 1 pinseq=2 T 450 7800 9 8 1 1 0 0 1 pinlabel=IO_L01P/CSO_B T 450 7800 5 8 0 1 0 2 1 pintype=io } P 100 7600 400 7600 1 0 0 { T 300 7650 5 8 1 1 0 6 1 pinnumber=56 T 300 7550 5 8 0 1 0 8 1 pinseq=3 T 450 7600 9 8 1 1 0 0 1 pinlabel=IO_L01N/INIT_B T 450 7600 5 8 0 1 0 2 1 pintype=io } P 100 7400 400 7400 1 0 0 { T 300 7450 5 8 1 1 0 6 1 pinnumber=57 T 300 7350 5 8 0 1 0 8 1 pinseq=4 T 450 7400 9 8 1 1 0 0 1 pinlabel=IP_L02P T 450 7400 5 8 0 1 0 2 1 pintype=in } P 100 7200 400 7200 1 0 0 { T 300 7250 5 8 1 1 0 6 1 pinnumber=58 T 300 7150 5 8 0 1 0 8 1 pinseq=5 T 450 7200 9 8 1 1 0 0 1 pinlabel=IP_L02N T 450 7200 5 8 0 1 0 2 1 pintype=in } P 100 7000 400 7000 1 0 0 { T 300 7050 5 8 1 1 0 6 1 pinnumber=60 T 300 6950 5 8 0 1 0 8 1 pinseq=6 T 450 7000 9 8 1 1 0 0 1 pinlabel=IO_L03P/DOUT/BUSY T 450 7000 5 8 0 1 0 2 1 pintype=io } P 100 6800 400 6800 1 0 0 { T 300 6850 5 8 1 1 0 6 1 pinnumber=61 T 300 6750 5 8 0 1 0 8 1 pinseq=7 T 450 6800 9 8 1 1 0 0 1 pinlabel=IO_L03N/MOSI/CSI_B T 450 6800 5 8 0 1 0 2 1 pintype=io } P 100 6600 400 6600 1 0 0 { T 300 6650 5 8 1 1 0 6 1 pinnumber=62 T 300 6550 5 8 0 1 0 8 1 pinseq=8 T 450 6600 9 8 1 1 0 0 1 pinlabel=IO_L04P T 450 6600 5 8 0 1 0 2 1 pintype=io } P 100 6400 400 6400 1 0 0 { T 300 6450 5 8 1 1 0 6 1 pinnumber=63 T 300 6350 5 8 0 1 0 8 1 pinseq=9 T 450 6400 9 8 1 1 0 0 1 pinlabel=IO_L04N T 450 6400 5 8 0 1 0 2 1 pintype=io } P 100 6200 400 6200 1 0 0 { T 300 6250 5 8 1 1 0 6 1 pinnumber=64 T 300 6150 5 8 0 1 0 8 1 pinseq=10 T 450 6200 9 8 1 1 0 0 1 pinlabel=IO_L05P T 450 6200 5 8 0 1 0 2 1 pintype=io } P 100 6000 400 6000 1 0 0 { T 300 6050 5 8 1 1 0 6 1 pinnumber=65 T 300 5950 5 8 0 1 0 8 1 pinseq=11 T 450 6000 9 8 1 1 0 0 1 pinlabel=IO_L05N T 450 6000 5 8 0 1 0 2 1 pintype=io } P 100 5800 400 5800 1 0 0 { T 300 5850 5 8 1 1 0 6 1 pinnumber=68 T 300 5750 5 8 0 1 0 8 1 pinseq=12 T 450 5800 9 8 1 1 0 0 1 pinlabel=IO_L06P T 450 5800 5 8 0 1 0 2 1 pintype=io } P 100 5600 400 5600 1 0 0 { T 300 5650 5 8 1 1 0 6 1 pinnumber=69 T 300 5550 5 8 0 1 0 8 1 pinseq=13 T 450 5600 9 8 1 1 0 0 1 pinlabel=IO_L06N T 450 5600 5 8 0 1 0 2 1 pintype=io } P 100 5400 400 5400 1 0 0 { T 300 5450 5 8 1 1 0 6 1 pinnumber=71 T 300 5350 5 8 0 1 0 8 1 pinseq=14 T 450 5400 9 8 1 1 0 0 1 pinlabel=IP_L07P T 450 5400 5 8 0 1 0 2 1 pintype=in } P 100 5200 400 5200 1 0 0 { T 300 5250 5 8 1 1 0 6 1 pinnumber=72 T 300 5150 5 8 0 1 0 8 1 pinseq=15 T 450 5200 9 8 1 1 0 0 1 pinlabel=IP_L07N/VREF T 450 5200 5 8 0 1 0 2 1 pintype=in } P 100 5000 400 5000 1 0 0 { T 300 5050 5 8 1 1 0 6 1 pinnumber=74 T 300 4950 5 8 0 1 0 8 1 pinseq=16 T 450 5000 9 8 1 1 0 0 1 pinlabel=IO_L08P/D7/GCLK12 T 450 5000 5 8 0 1 0 2 1 pintype=io } P 100 4800 400 4800 1 0 0 { T 300 4850 5 8 1 1 0 6 1 pinnumber=75 T 300 4750 5 8 0 1 0 8 1 pinseq=17 T 450 4800 9 8 1 1 0 0 1 pinlabel=IO_L08N/D6/GCLK13 T 450 4800 5 8 0 1 0 2 1 pintype=io } P 100 4600 400 4600 1 0 0 { T 300 4650 5 8 1 1 0 6 1 pinnumber=76 T 300 4550 5 8 0 1 0 8 1 pinseq=18 T 450 4600 9 8 1 1 0 0 1 pinlabel=IO/D5 T 450 4600 5 8 0 1 0 2 1 pintype=io } P 100 4400 400 4400 1 0 0 { T 300 4450 5 8 1 1 0 6 1 pinnumber=77 T 300 4350 5 8 0 1 0 8 1 pinseq=19 T 450 4400 9 8 1 1 0 0 1 pinlabel=IO_L09P/D4/GCLK14 T 450 4400 5 8 0 1 0 2 1 pintype=io } P 100 4200 400 4200 1 0 0 { T 300 4250 5 8 1 1 0 6 1 pinnumber=78 T 300 4150 5 8 0 1 0 8 1 pinseq=20 T 450 4200 9 8 1 1 0 0 1 pinlabel=IO_L09N/D3/GCLK15 T 450 4200 5 8 0 1 0 2 1 pintype=io } P 100 4000 400 4000 1 0 0 { T 300 4050 5 8 1 1 0 6 1 pinnumber=80 T 300 3950 5 8 0 1 0 8 1 pinseq=21 T 450 4000 9 8 1 1 0 0 1 pinlabel=IP_L10P/RDWR_B/GCLK0 T 450 4000 5 8 0 1 0 2 1 pintype=in } P 100 3800 400 3800 1 0 0 { T 300 3850 5 8 1 1 0 6 1 pinnumber=81 T 300 3750 5 8 0 1 0 8 1 pinseq=22 T 450 3800 9 8 1 1 0 0 1 pinlabel=IP_L10N/M2/GCLK1 T 450 3800 5 8 0 1 0 2 1 pintype=in } P 100 3600 400 3600 1 0 0 { T 300 3650 5 8 1 1 0 6 1 pinnumber=82 T 300 3550 5 8 0 1 0 8 1 pinseq=23 T 450 3600 9 8 1 1 0 0 1 pinlabel=IO_L11P/D2/GCLK2 T 450 3600 5 8 0 1 0 2 1 pintype=io } P 100 3400 400 3400 1 0 0 { T 300 3450 5 8 1 1 0 6 1 pinnumber=83 T 300 3350 5 8 0 1 0 8 1 pinseq=24 T 450 3400 9 8 1 1 0 0 1 pinlabel=IO_L11N/D1/GCLK3 T 450 3400 5 8 0 1 0 2 1 pintype=io } P 100 3200 400 3200 1 0 0 { T 300 3250 5 8 1 1 0 6 1 pinnumber=84 T 300 3150 5 8 0 1 0 8 1 pinseq=25 T 450 3200 9 8 1 1 0 0 1 pinlabel=IO/M1 T 450 3200 5 8 0 1 0 2 1 pintype=io } P 100 3000 400 3000 1 0 0 { T 300 3050 5 8 1 1 0 6 1 pinnumber=86 T 300 2950 5 8 0 1 0 8 1 pinseq=26 T 450 3000 9 8 1 1 0 0 1 pinlabel=IO_L12P/M0 T 450 3000 5 8 0 1 0 2 1 pintype=io } P 100 2800 400 2800 1 0 0 { T 300 2850 5 8 1 1 0 6 1 pinnumber=87 T 300 2750 5 8 0 1 0 8 1 pinseq=27 T 450 2800 9 8 1 1 0 0 1 pinlabel=IO_L12N/DIN/D0 T 450 2800 5 8 0 1 0 2 1 pintype=io } P 100 2600 400 2600 1 0 0 { T 300 2650 5 8 1 1 0 6 1 pinnumber=89 T 300 2550 5 8 0 1 0 8 1 pinseq=28 T 450 2600 9 8 1 1 0 0 1 pinlabel=IO_L13P T 450 2600 5 8 0 1 0 2 1 pintype=io } P 100 2400 400 2400 1 0 0 { T 300 2450 5 8 1 1 0 6 1 pinnumber=90 T 300 2350 5 8 0 1 0 8 1 pinseq=29 T 450 2400 9 8 1 1 0 0 1 pinlabel=IO_L13N T 450 2400 5 8 0 1 0 2 1 pintype=io } P 100 2200 400 2200 1 0 0 { T 300 2250 5 8 1 1 0 6 1 pinnumber=91 T 300 2150 5 8 0 1 0 8 1 pinseq=30 T 450 2200 9 8 1 1 0 0 1 pinlabel=IP T 450 2200 5 8 0 1 0 2 1 pintype=in } P 100 2000 400 2000 1 0 0 { T 300 2050 5 8 1 1 0 6 1 pinnumber=93 T 300 1950 5 8 0 1 0 8 1 pinseq=31 T 450 2000 9 8 1 1 0 0 1 pinlabel=IO_L14P/A23 T 450 2000 5 8 0 1 0 2 1 pintype=io } P 100 1800 400 1800 1 0 0 { T 300 1850 5 8 1 1 0 6 1 pinnumber=94 T 300 1750 5 8 0 1 0 8 1 pinseq=32 T 450 1800 9 8 1 1 0 0 1 pinlabel=IO_L14N/A22 T 450 1800 5 8 0 1 0 2 1 pintype=io } P 100 1600 400 1600 1 0 0 { T 300 1650 5 8 1 1 0 6 1 pinnumber=96 T 300 1550 5 8 0 1 0 8 1 pinseq=33 T 450 1600 9 8 1 1 0 0 1 pinlabel=IO_L15P/A21 T 450 1600 5 8 0 1 0 2 1 pintype=io } P 100 1400 400 1400 1 0 0 { T 300 1450 5 8 1 1 0 6 1 pinnumber=97 T 300 1350 5 8 0 1 0 8 1 pinseq=34 T 450 1400 9 8 1 1 0 0 1 pinlabel=IO_L15N/A20 T 450 1400 5 8 0 1 0 2 1 pintype=io } P 100 1200 400 1200 1 0 0 { T 300 1250 5 8 1 1 0 6 1 pinnumber=98 T 300 1150 5 8 0 1 0 8 1 pinseq=35 T 450 1200 9 8 1 1 0 0 1 pinlabel=IO/VREF T 450 1200 5 8 0 1 0 2 1 pintype=io } P 100 1000 400 1000 1 0 0 { T 300 1050 5 8 1 1 0 6 1 pinnumber=99 T 300 950 5 8 0 1 0 8 1 pinseq=36 T 450 1000 9 8 1 1 0 0 1 pinlabel=IO_L16P/VS2/A19 T 450 1000 5 8 0 1 0 2 1 pintype=io } P 100 800 400 800 1 0 0 { T 300 850 5 8 1 1 0 6 1 pinnumber=100 T 300 750 5 8 0 1 0 8 1 pinseq=37 T 450 800 9 8 1 1 0 0 1 pinlabel=IO_L16N/VS1/A18 T 450 800 5 8 0 1 0 2 1 pintype=io } P 100 600 400 600 1 0 0 { T 300 650 5 8 1 1 0 6 1 pinnumber=101 T 300 550 5 8 0 1 0 8 1 pinseq=38 T 450 600 9 8 1 1 0 0 1 pinlabel=IP T 450 600 5 8 0 1 0 2 1 pintype=in } P 100 400 400 400 1 0 0 { T 300 450 5 8 1 1 0 6 1 pinnumber=102 T 300 350 5 8 0 1 0 8 1 pinseq=39 T 450 400 9 8 1 1 0 0 1 pinlabel=IO_L17P/VS0/A17 T 450 400 5 8 0 1 0 2 1 pintype=io } P 100 200 400 200 1 0 0 { T 300 250 5 8 1 1 0 6 1 pinnumber=103 T 300 150 5 8 0 1 0 8 1 pinseq=40 T 450 200 9 8 1 1 0 0 1 pinlabel=IO_L17N/CCLK T 450 200 5 8 0 1 0 2 1 pintype=io } B 400 0 2400 8200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 2800 8300 8 10 1 1 0 6 1 refdes=U? T 400 8500 5 10 0 0 0 0 1 device=XC3S500E-PQ208 T 400 8700 5 10 0 0 0 0 1 footprint=QFP208_28 T 400 8900 5 10 0 0 0 0 1 author=Stefan Salewski T 400 9100 5 10 0 0 0 0 1 documentation=http://www.xilinx.com/support/documentation/data_sheets/ds312.pdf T 400 9300 5 10 0 0 0 0 1 description=FPGA T 400 9500 5 10 0 0 0 0 1 numslots=0 T 400 9700 5 10 0 0 0 0 1 dist-license=GPL T 400 9900 5 10 0 0 0 0 1 use-license=unlimited T 400 10100 5 10 0 0 0 0 1 comment=generated with Python script tragesym T 2100 7900 9 10 1 0 0 0 1 Bank 2 T 400 8300 5 10 1 1 0 0 1 value=XC3S500E-PQ208