v 20111231 2 B 300 0 5100 17000 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 P 0 8600 300 8600 1 0 0 { T 350 8600 9 10 1 1 0 1 1 pinlabel=TDO/SWO T 200 8650 5 8 1 1 0 6 1 pinnumber=1 T 200 8650 5 8 0 1 0 6 1 pinseq=1 T 200 8650 9 10 0 1 0 6 1 pintype=pas } P 0 8200 300 8200 1 0 0 { T 350 8200 9 10 1 1 0 1 1 pinlabel=TDI T 200 8250 5 8 1 1 0 6 1 pinnumber=2 T 200 8250 5 8 0 1 0 6 1 pinseq=2 T 200 8250 9 10 0 1 0 6 1 pintype=pas } P 0 7800 300 7800 1 0 0 { T 350 7800 9 10 1 1 0 1 1 pinlabel=TMS/SWDIO T 200 7850 5 8 1 1 0 6 1 pinnumber=3 T 200 7850 5 8 0 1 0 6 1 pinseq=3 T 200 7850 9 10 0 1 0 6 1 pintype=pas } P 0 7400 300 7400 1 0 0 { T 350 7400 9 10 1 1 0 1 1 pinlabel=TRST T 200 7450 5 8 1 1 0 6 1 pinnumber=4 T 200 7450 5 8 0 1 0 6 1 pinseq=4 T 200 7450 9 10 0 1 0 6 1 pintype=pas } P 0 7000 300 7000 1 0 0 { T 350 7000 9 10 1 1 0 1 1 pinlabel=TCK/SWDCLK T 200 7050 5 8 1 1 0 6 1 pinnumber=5 T 200 7050 5 8 0 1 0 6 1 pinseq=5 T 200 7050 9 10 0 1 0 6 1 pintype=pas } P 5700 12000 5400 12000 1 0 0 { T 5350 12000 9 10 1 1 0 7 1 pinlabel=P0[26]/AD0[3]/AOUT/RXD3 T 5500 12050 5 8 1 1 0 0 1 pinnumber=6 T 5500 12050 5 8 0 1 0 0 1 pinseq=6 T 5300 12050 9 10 0 1 0 6 1 pintype=pas } P 5700 12200 5400 12200 1 0 0 { T 5350 12200 9 10 1 1 0 7 1 pinlabel=P0[25]/AD0[2]/I2SRX_SDA/TXD3 T 5500 12250 5 8 1 1 0 0 1 pinnumber=7 T 5500 12250 5 8 0 1 0 0 1 pinseq=7 T 5300 12250 9 10 0 1 0 6 1 pintype=pas } P 5700 12400 5400 12400 1 0 0 { T 5350 12400 9 10 1 1 0 7 1 pinlabel=P0[24]/AD0[1]/I2SRX_WS/CAP3[1] T 5500 12450 5 8 1 1 0 0 1 pinnumber=8 T 5500 12450 5 8 0 1 0 0 1 pinseq=8 T 5300 12450 9 10 0 1 0 6 1 pintype=pas } P 5700 12600 5400 12600 1 0 0 { T 5350 12600 9 10 1 1 0 7 1 pinlabel=P0[23]/AD0[0]/I2SRX_CLK/CAP3[0] T 5500 12650 5 8 1 1 0 0 1 pinnumber=9 T 5500 12650 5 8 0 1 0 0 1 pinseq=9 T 5300 12650 9 10 0 1 0 6 1 pintype=pas } P 0 16600 300 16600 1 0 0 { T 350 16600 9 10 1 1 0 1 1 pinlabel=VDDA T 200 16650 5 8 1 1 0 6 1 pinnumber=10 T 200 16650 5 8 0 1 0 6 1 pinseq=10 T 200 16650 9 10 0 1 0 6 1 pintype=pas } P 0 12600 300 12600 1 0 0 { T 350 12600 9 10 1 1 0 1 1 pinlabel=VSSA T 200 12650 5 8 1 1 0 6 1 pinnumber=11 T 200 12650 5 8 0 1 0 6 1 pinseq=11 T 200 12650 9 10 0 1 0 6 1 pintype=pas } P 0 13400 300 13400 1 0 0 { T 350 13400 9 10 1 1 0 1 1 pinlabel=VREFP T 200 13450 5 8 1 1 0 6 1 pinnumber=12 T 200 13450 5 8 0 1 0 6 1 pinseq=12 T 200 13450 9 10 0 1 0 6 1 pintype=pas } P 0 5800 300 5800 1 0 0 { T 350 5800 9 10 1 1 0 1 1 pinlabel=n.c. T 200 5850 5 8 1 1 0 6 1 pinnumber=13 T 200 5850 5 8 0 1 0 6 1 pinseq=13 T 200 5850 9 10 0 1 0 6 1 pintype=pas } P 0 5000 300 5000 1 0 0 { T 350 5000 9 10 1 1 0 1 1 pinlabel=RSTOUT T 200 5050 5 8 1 1 0 6 1 pinnumber=14 T 200 5050 5 8 0 1 0 6 1 pinseq=14 T 200 5050 9 10 0 1 0 6 1 pintype=pas } P 0 9400 300 9400 1 0 0 { T 350 9400 9 10 1 1 0 1 1 pinlabel=VREFN T 200 9450 5 8 1 1 0 6 1 pinnumber=15 T 200 9450 5 8 0 1 0 6 1 pinseq=15 T 200 9450 9 10 0 1 0 6 1 pintype=pas } P 0 3400 300 3400 1 0 0 { T 350 3400 9 10 1 1 0 1 1 pinlabel=RTCX1 T 200 3450 5 8 1 1 0 6 1 pinnumber=16 T 200 3450 5 8 0 1 0 6 1 pinseq=16 T 200 3450 9 10 0 1 0 6 1 pintype=pas } P 0 4200 300 4200 1 0 0 { T 350 4200 9 10 1 1 0 1 1 pinlabel=RESET T 200 4250 5 8 1 1 0 6 1 pinnumber=17 T 200 4250 5 8 0 1 0 6 1 pinseq=17 T 200 4250 9 10 0 1 0 6 1 pintype=pas } P 0 3000 300 3000 1 0 0 { T 350 3000 9 10 1 1 0 1 1 pinlabel=RTCX2 T 200 3050 5 8 1 1 0 6 1 pinnumber=18 T 200 3050 5 8 0 1 0 6 1 pinseq=18 T 200 3050 9 10 0 1 0 6 1 pintype=pas } P 0 2200 300 2200 1 0 0 { T 350 2200 9 10 1 1 0 1 1 pinlabel=VBAT T 200 2250 5 8 1 1 0 6 1 pinnumber=19 T 200 2250 5 8 0 1 0 6 1 pinseq=19 T 200 2250 9 10 0 1 0 6 1 pintype=pas } P 5700 5800 5400 5800 1 0 0 { T 5350 5800 9 10 1 1 0 7 1 pinlabel=P1[31]/SCK1/AD0[5] T 5500 5850 5 8 1 1 0 0 1 pinnumber=20 T 5500 5850 5 8 0 1 0 0 1 pinseq=20 T 5300 5850 9 10 0 1 0 6 1 pintype=pas } P 5700 6000 5400 6000 1 0 0 { T 5350 6000 9 10 1 1 0 7 1 pinlabel=P1[30]/VBUS/AD0[4] T 5500 6050 5 8 1 1 0 0 1 pinnumber=21 T 5500 6050 5 8 0 1 0 0 1 pinseq=21 T 5300 6050 9 10 0 1 0 6 1 pintype=pas } P 0 1400 300 1400 1 0 0 { T 350 1400 9 10 1 1 0 1 1 pinlabel=XTAL1 T 200 1450 5 8 1 1 0 6 1 pinnumber=22 T 200 1450 5 8 0 1 0 6 1 pinseq=22 T 200 1450 9 10 0 1 0 6 1 pintype=pas } P 0 1000 300 1000 1 0 0 { T 350 1000 9 10 1 1 0 1 1 pinlabel=XTAL2 T 200 1050 5 8 1 1 0 6 1 pinnumber=23 T 200 1050 5 8 0 1 0 6 1 pinseq=23 T 200 1050 9 10 0 1 0 6 1 pintype=pas } P 5700 11600 5400 11600 1 0 0 { T 5350 11600 9 10 1 1 0 7 1 pinlabel=P0[28]/SCL0/USB_SCL T 5500 11650 5 8 1 1 0 0 1 pinnumber=24 T 5500 11650 5 8 0 1 0 0 1 pinseq=24 T 5300 11650 9 10 0 1 0 6 1 pintype=pas } P 5700 11800 5400 11800 1 0 0 { T 5350 11800 9 10 1 1 0 7 1 pinlabel=P0[27]/SDA0/USB_SDA T 5500 11850 5 8 1 1 0 0 1 pinnumber=25 T 5500 11850 5 8 0 1 0 0 1 pinseq=25 T 5300 11850 9 10 0 1 0 6 1 pintype=pas } P 5700 1400 5400 1400 1 0 0 { T 5350 1400 9 10 1 1 0 7 1 pinlabel=P3[26]/STCLK/MAT0[1]/PWM1[3] T 5500 1450 5 8 1 1 0 0 1 pinnumber=26 T 5500 1450 5 8 0 1 0 0 1 pinseq=26 T 5300 1450 9 10 0 1 0 6 1 pintype=pas } P 5700 1600 5400 1600 1 0 0 { T 5350 1600 9 10 1 1 0 7 1 pinlabel=P3[25]/MAT0[0]/PWM1[2] T 5500 1650 5 8 1 1 0 0 1 pinnumber=27 T 5500 1650 5 8 0 1 0 0 1 pinseq=27 T 5300 1650 9 10 0 1 0 6 1 pintype=pas } P 0 16200 300 16200 1 0 0 { T 350 16200 9 10 1 1 0 1 1 pinlabel=VDD(3V3) T 200 16250 5 8 1 1 0 6 1 pinnumber=28 T 200 16250 5 8 0 1 0 6 1 pinseq=28 T 200 16250 9 10 0 1 0 6 1 pintype=pas } P 5700 11400 5400 11400 1 0 0 { T 5350 11400 9 10 1 1 0 7 1 pinlabel=P0[29]/USB_D+ T 5500 11450 5 8 1 1 0 0 1 pinnumber=29 T 5500 11450 5 8 0 1 0 0 1 pinseq=29 T 5300 11450 9 10 0 1 0 6 1 pintype=pas } P 5700 11200 5400 11200 1 0 0 { T 5350 11200 9 10 1 1 0 7 1 pinlabel=P0[30]/USB_D− T 5500 11250 5 8 1 1 0 0 1 pinnumber=30 T 5500 11250 5 8 0 1 0 0 1 pinseq=30 T 5300 11250 9 10 0 1 0 6 1 pintype=pas } P 0 12200 300 12200 1 0 0 { T 350 12200 9 10 1 1 0 1 1 pinlabel=VSS T 200 12250 5 8 1 1 0 6 1 pinnumber=31 T 200 12250 5 8 0 1 0 6 1 pinseq=31 T 200 12250 9 10 0 1 0 6 1 pintype=pas } P 5700 8400 5400 8400 1 0 0 { T 5350 8400 9 10 1 1 0 7 1 pinlabel=P1[18]/USB_UP_LED/PWM1[1]/CAP1[0] T 5500 8450 5 8 1 1 0 0 1 pinnumber=32 T 5500 8450 5 8 0 1 0 0 1 pinseq=32 T 5300 8450 9 10 0 1 0 6 1 pintype=pas } P 5700 8200 5400 8200 1 0 0 { T 5350 8200 9 10 1 1 0 7 1 pinlabel=P1[19]/MCOA0/USB_PPWR/CAP1[1] T 5500 8250 5 8 1 1 0 0 1 pinnumber=33 T 5500 8250 5 8 0 1 0 0 1 pinseq=33 T 5300 8250 9 10 0 1 0 6 1 pintype=pas } P 5700 8000 5400 8000 1 0 0 { T 5350 8000 9 10 1 1 0 7 1 pinlabel=P1[20]/MCI0/PWM1[2]/SCK0 T 5500 8050 5 8 1 1 0 0 1 pinnumber=34 T 5500 8050 5 8 0 1 0 0 1 pinseq=34 T 5300 8050 9 10 0 1 0 6 1 pintype=pas } P 5700 7800 5400 7800 1 0 0 { T 5350 7800 9 10 1 1 0 7 1 pinlabel=P1[21]/MCABORT/PWM1[3]/SSEL0 T 5500 7850 5 8 1 1 0 0 1 pinnumber=35 T 5500 7850 5 8 0 1 0 0 1 pinseq=35 T 5300 7850 9 10 0 1 0 6 1 pintype=pas } P 5700 7600 5400 7600 1 0 0 { T 5350 7600 9 10 1 1 0 7 1 pinlabel=P1[22]/MCOB0/USB_PWRD/MAT1[0] T 5500 7650 5 8 1 1 0 0 1 pinnumber=36 T 5500 7650 5 8 0 1 0 0 1 pinseq=36 T 5300 7650 9 10 0 1 0 6 1 pintype=pas } P 5700 7400 5400 7400 1 0 0 { T 5350 7400 9 10 1 1 0 7 1 pinlabel=P1[23]/MCI1/PWM1[4]/MISO0 T 5500 7450 5 8 1 1 0 0 1 pinnumber=37 T 5500 7450 5 8 0 1 0 0 1 pinseq=37 T 5300 7450 9 10 0 1 0 6 1 pintype=pas } P 5700 7200 5400 7200 1 0 0 { T 5350 7200 9 10 1 1 0 7 1 pinlabel=P1[24]/MCI2/PWM1[5]/MOSI0 T 5500 7250 5 8 1 1 0 0 1 pinnumber=38 T 5500 7250 5 8 0 1 0 0 1 pinseq=38 T 5300 7250 9 10 0 1 0 6 1 pintype=pas } P 5700 7000 5400 7000 1 0 0 { T 5350 7000 9 10 1 1 0 7 1 pinlabel=P1[25]/MCOA1/MAT1[1] T 5500 7050 5 8 1 1 0 0 1 pinnumber=39 T 5500 7050 5 8 0 1 0 0 1 pinseq=39 T 5300 7050 9 10 0 1 0 6 1 pintype=pas } P 5700 6800 5400 6800 1 0 0 { T 5350 6800 9 10 1 1 0 7 1 pinlabel=P1[26]/MCOB1/PWM1[6]/CAP0[0] T 5500 6850 5 8 1 1 0 0 1 pinnumber=40 T 5500 6850 5 8 0 1 0 0 1 pinseq=40 T 5300 6850 9 10 0 1 0 6 1 pintype=pas } P 0 11800 300 11800 1 0 0 { T 350 11800 9 10 1 1 0 1 1 pinlabel=VSS T 200 11850 5 8 1 1 0 6 1 pinnumber=41 T 200 11850 5 8 0 1 0 6 1 pinseq=41 T 200 11850 9 10 0 1 0 6 1 pintype=pas } P 0 15800 300 15800 1 0 0 { T 350 15800 9 10 1 1 0 1 1 pinlabel=VDD(REG)(3V3) T 200 15850 5 8 1 1 0 6 1 pinnumber=42 T 200 15850 5 8 0 1 0 6 1 pinseq=42 T 200 15850 9 10 0 1 0 6 1 pintype=pas } P 5700 6600 5400 6600 1 0 0 { T 5350 6600 9 10 1 1 0 7 1 pinlabel=P1[27]/CLKOUT/USB_OVRCR/CAP0[1] T 5500 6650 5 8 1 1 0 0 1 pinnumber=43 T 5500 6650 5 8 0 1 0 0 1 pinseq=43 T 5300 6650 9 10 0 1 0 6 1 pintype=pas } P 5700 6400 5400 6400 1 0 0 { T 5350 6400 9 10 1 1 0 7 1 pinlabel=P1[28]/MCOA2/PCAP1[0]/MAT0[0] T 5500 6450 5 8 1 1 0 0 1 pinnumber=44 T 5500 6450 5 8 0 1 0 0 1 pinseq=44 T 5300 6450 9 10 0 1 0 6 1 pintype=pas } P 5700 6200 5400 6200 1 0 0 { T 5350 6200 9 10 1 1 0 7 1 pinlabel=P1[29]/MCOB2/PCAP1[1]/MAT0[1] T 5500 6250 5 8 1 1 0 0 1 pinnumber=45 T 5500 6250 5 8 0 1 0 0 1 pinseq=45 T 5300 6250 9 10 0 1 0 6 1 pintype=pas } P 5700 16600 5400 16600 1 0 0 { T 5350 16600 9 10 1 1 0 7 1 pinlabel=P0[0]/RD1/TXD3/SDA1 T 5500 16650 5 8 1 1 0 0 1 pinnumber=46 T 5500 16650 5 8 0 1 0 0 1 pinseq=46 T 5300 16650 9 10 0 1 0 6 1 pintype=pas } P 5700 16400 5400 16400 1 0 0 { T 5350 16400 9 10 1 1 0 7 1 pinlabel=P0[1]/TD1/RXD3/SCL1 T 5500 16450 5 8 1 1 0 0 1 pinnumber=47 T 5500 16450 5 8 0 1 0 0 1 pinseq=47 T 5300 16450 9 10 0 1 0 6 1 pintype=pas } P 5700 14600 5400 14600 1 0 0 { T 5350 14600 9 10 1 1 0 7 1 pinlabel=P0[10]/TXD2/SDA2/MAT3[0] T 5500 14650 5 8 1 1 0 0 1 pinnumber=48 T 5500 14650 5 8 0 1 0 0 1 pinseq=48 T 5300 14650 9 10 0 1 0 6 1 pintype=pas } P 5700 14400 5400 14400 1 0 0 { T 5350 14400 9 10 1 1 0 7 1 pinlabel=P0[11]/RXD2/SCL2/MAT3[1] T 5500 14450 5 8 1 1 0 0 1 pinnumber=49 T 5500 14450 5 8 0 1 0 0 1 pinseq=49 T 5300 14450 9 10 0 1 0 6 1 pintype=pas } P 5700 2400 5400 2400 1 0 0 { T 5350 2400 9 10 1 1 0 7 1 pinlabel=P2[13]/EINT3/I2STX_SDA T 5500 2450 5 8 1 1 0 0 1 pinnumber=50 T 5500 2450 5 8 0 1 0 0 1 pinseq=50 T 5300 2450 9 10 0 1 0 6 1 pintype=pas } P 5700 2600 5400 2600 1 0 0 { T 5350 2600 9 10 1 1 0 7 1 pinlabel=P2[12]/EINT2/I2STX_WS T 5500 2650 5 8 1 1 0 0 1 pinnumber=51 T 5500 2650 5 8 0 1 0 0 1 pinseq=51 T 5300 2650 9 10 0 1 0 6 1 pintype=pas } P 5700 2800 5400 2800 1 0 0 { T 5350 2800 9 10 1 1 0 7 1 pinlabel=P2[11]/EINT1/I2STX_CLK T 5500 2850 5 8 1 1 0 0 1 pinnumber=52 T 5500 2850 5 8 0 1 0 0 1 pinseq=52 T 5300 2850 9 10 0 1 0 6 1 pintype=pas } P 5700 3000 5400 3000 1 0 0 { T 5350 3000 9 10 1 1 0 7 1 pinlabel=P2[10]/EINT0/NMI T 5500 3050 5 8 1 1 0 0 1 pinnumber=53 T 5500 3050 5 8 0 1 0 0 1 pinseq=53 T 5300 3050 9 10 0 1 0 6 1 pintype=pas } P 0 15400 300 15400 1 0 0 { T 350 15400 9 10 1 1 0 1 1 pinlabel=VDD(3V3) T 200 15450 5 8 1 1 0 6 1 pinnumber=54 T 200 15450 5 8 0 1 0 6 1 pinseq=54 T 200 15450 9 10 0 1 0 6 1 pintype=pas } P 0 11400 300 11400 1 0 0 { T 350 11400 9 10 1 1 0 1 1 pinlabel=VSS T 200 11450 5 8 1 1 0 6 1 pinnumber=55 T 200 11450 5 8 0 1 0 6 1 pinseq=55 T 200 11450 9 10 0 1 0 6 1 pintype=pas } P 5700 12800 5400 12800 1 0 0 { T 5350 12800 9 10 1 1 0 7 1 pinlabel=P0[22]/RTS1/TD1 T 5500 12850 5 8 1 1 0 0 1 pinnumber=56 T 5500 12850 5 8 0 1 0 0 1 pinseq=56 T 5300 12850 9 10 0 1 0 6 1 pintype=pas } P 5700 13000 5400 13000 1 0 0 { T 5350 13000 9 10 1 1 0 7 1 pinlabel=P0[21]/RI1/RD1 T 5500 13050 5 8 1 1 0 0 1 pinnumber=57 T 5500 13050 5 8 0 1 0 0 1 pinseq=57 T 5300 13050 9 10 0 1 0 6 1 pintype=pas } P 5700 13200 5400 13200 1 0 0 { T 5350 13200 9 10 1 1 0 7 1 pinlabel=P0[20]/DTR1/SCL1 T 5500 13250 5 8 1 1 0 0 1 pinnumber=58 T 5500 13250 5 8 0 1 0 0 1 pinseq=58 T 5300 13250 9 10 0 1 0 6 1 pintype=pas } P 5700 13400 5400 13400 1 0 0 { T 5350 13400 9 10 1 1 0 7 1 pinlabel=P0[19]/DSR1/SDA1 T 5500 13450 5 8 1 1 0 0 1 pinnumber=59 T 5500 13450 5 8 0 1 0 0 1 pinseq=59 T 5300 13450 9 10 0 1 0 6 1 pintype=pas } P 5700 13600 5400 13600 1 0 0 { T 5350 13600 9 10 1 1 0 7 1 pinlabel=P0[18]/DCD1/MOSI0/MOSI T 5500 13650 5 8 1 1 0 0 1 pinnumber=60 T 5500 13650 5 8 0 1 0 0 1 pinseq=60 T 5300 13650 9 10 0 1 0 6 1 pintype=pas } P 5700 13800 5400 13800 1 0 0 { T 5350 13800 9 10 1 1 0 7 1 pinlabel=P0[17]/CTS1/MISO0/MISO T 5500 13850 5 8 1 1 0 0 1 pinnumber=61 T 5500 13850 5 8 0 1 0 0 1 pinseq=61 T 5300 13850 9 10 0 1 0 6 1 pintype=pas } P 5700 14200 5400 14200 1 0 0 { T 5350 14200 9 10 1 1 0 7 1 pinlabel=P0[15]/TXD1/SCK0/SCK T 5500 14250 5 8 1 1 0 0 1 pinnumber=62 T 5500 14250 5 8 0 1 0 0 1 pinseq=62 T 5300 14250 9 10 0 1 0 6 1 pintype=pas } P 5700 14000 5400 14000 1 0 0 { T 5350 14000 9 10 1 1 0 7 1 pinlabel=P0[16]/RXD1/SSEL0/SSEL T 5500 14050 5 8 1 1 0 0 1 pinnumber=63 T 5500 14050 5 8 0 1 0 0 1 pinseq=63 T 5300 14050 9 10 0 1 0 6 1 pintype=pas } P 5700 3200 5400 3200 1 0 0 { T 5350 3200 9 10 1 1 0 7 1 pinlabel=P2[9]/USB_CONNECT/RXD2 T 5500 3250 5 8 1 1 0 0 1 pinnumber=64 T 5500 3250 5 8 0 1 0 0 1 pinseq=64 T 5300 3250 9 10 0 1 0 6 1 pintype=pas } P 5700 3400 5400 3400 1 0 0 { T 5350 3400 9 10 1 1 0 7 1 pinlabel=P2[8]/TD2/TXD2 T 5500 3450 5 8 1 1 0 0 1 pinnumber=65 T 5500 3450 5 8 0 1 0 0 1 pinseq=65 T 5300 3450 9 10 0 1 0 6 1 pintype=pas } P 5700 3600 5400 3600 1 0 0 { T 5350 3600 9 10 1 1 0 7 1 pinlabel=P2[7]/RD2/RTS1 T 5500 3650 5 8 1 1 0 0 1 pinnumber=66 T 5500 3650 5 8 0 1 0 0 1 pinseq=66 T 5300 3650 9 10 0 1 0 6 1 pintype=pas } P 5700 3800 5400 3800 1 0 0 { T 5350 3800 9 10 1 1 0 7 1 pinlabel=P2[6]/PCAP1[0]/RI1/TRACECLK T 5500 3850 5 8 1 1 0 0 1 pinnumber=67 T 5500 3850 5 8 0 1 0 0 1 pinseq=67 T 5300 3850 9 10 0 1 0 6 1 pintype=pas } P 5700 4000 5400 4000 1 0 0 { T 5350 4000 9 10 1 1 0 7 1 pinlabel=P2[5]/PWM1[6]/DTR1/TRACEDATA[0] T 5500 4050 5 8 1 1 0 0 1 pinnumber=68 T 5500 4050 5 8 0 1 0 0 1 pinseq=68 T 5300 4050 9 10 0 1 0 6 1 pintype=pas } P 5700 4200 5400 4200 1 0 0 { T 5350 4200 9 10 1 1 0 7 1 pinlabel=P2[4]/PWM1[5]/DSR1/TRACEDATA[1] T 5500 4250 5 8 1 1 0 0 1 pinnumber=69 T 5500 4250 5 8 0 1 0 0 1 pinseq=69 T 5300 4250 9 10 0 1 0 6 1 pintype=pas } P 5700 4400 5400 4400 1 0 0 { T 5350 4400 9 10 1 1 0 7 1 pinlabel=P2[3]/PWM1[4]/DCD1/TRACEDATA[2] T 5500 4450 5 8 1 1 0 0 1 pinnumber=70 T 5500 4450 5 8 0 1 0 0 1 pinseq=70 T 5300 4450 9 10 0 1 0 6 1 pintype=pas } P 0 15000 300 15000 1 0 0 { T 350 15000 9 10 1 1 0 1 1 pinlabel=VDD(3V3) T 200 15050 5 8 1 1 0 6 1 pinnumber=71 T 200 15050 5 8 0 1 0 6 1 pinseq=71 T 200 15050 9 10 0 1 0 6 1 pintype=pas } P 0 11000 300 11000 1 0 0 { T 350 11000 9 10 1 1 0 1 1 pinlabel=VSS T 200 11050 5 8 1 1 0 6 1 pinnumber=72 T 200 11050 5 8 0 1 0 6 1 pinseq=72 T 200 11050 9 10 0 1 0 6 1 pintype=pas } P 5700 4600 5400 4600 1 0 0 { T 5350 4600 9 10 1 1 0 7 1 pinlabel=P2[2]/PWM1[3]/CTS1/TRACEDATA[3] T 5500 4650 5 8 1 1 0 0 1 pinnumber=73 T 5500 4650 5 8 0 1 0 0 1 pinseq=73 T 5300 4650 9 10 0 1 0 6 1 pintype=pas } P 5700 4800 5400 4800 1 0 0 { T 5350 4800 9 10 1 1 0 7 1 pinlabel=P2[1]/PWM1[2]/RXD1 T 5500 4850 5 8 1 1 0 0 1 pinnumber=74 T 5500 4850 5 8 0 1 0 0 1 pinseq=74 T 5300 4850 9 10 0 1 0 6 1 pintype=pas } P 5700 5000 5400 5000 1 0 0 { T 5350 5000 9 10 1 1 0 7 1 pinlabel=P2[0]/PWM1[1]/TXD1 T 5500 5050 5 8 1 1 0 0 1 pinnumber=75 T 5500 5050 5 8 0 1 0 0 1 pinseq=75 T 5300 5050 9 10 0 1 0 6 1 pintype=pas } P 5700 14800 5400 14800 1 0 0 { T 5350 14800 9 10 1 1 0 7 1 pinlabel=P0[9]/I2STX_SDA/MOSI1/MAT2[3] T 5500 14850 5 8 1 1 0 0 1 pinnumber=76 T 5500 14850 5 8 0 1 0 0 1 pinseq=76 T 5300 14850 9 10 0 1 0 6 1 pintype=pas } P 5700 15000 5400 15000 1 0 0 { T 5350 15000 9 10 1 1 0 7 1 pinlabel=P0[8]/I2STX_WS/MISO1/MAT2[2] T 5500 15050 5 8 1 1 0 0 1 pinnumber=77 T 5500 15050 5 8 0 1 0 0 1 pinseq=77 T 5300 15050 9 10 0 1 0 6 1 pintype=pas } P 5700 15200 5400 15200 1 0 0 { T 5350 15200 9 10 1 1 0 7 1 pinlabel=P0[7]/I2STX_CLK/SCK1/MAT2[1] T 5500 15250 5 8 1 1 0 0 1 pinnumber=78 T 5500 15250 5 8 0 1 0 0 1 pinseq=78 T 5300 15250 9 10 0 1 0 6 1 pintype=pas } P 5700 15400 5400 15400 1 0 0 { T 5350 15400 9 10 1 1 0 7 1 pinlabel=P0[6]/I2SRX_SDA/SSEL1/MAT2[0] T 5500 15450 5 8 1 1 0 0 1 pinnumber=79 T 5500 15450 5 8 0 1 0 0 1 pinseq=79 T 5300 15450 9 10 0 1 0 6 1 pintype=pas } P 5700 15600 5400 15600 1 0 0 { T 5350 15600 9 10 1 1 0 7 1 pinlabel=P0[5]/I2SRX_WS/TD2/CAP2[1] T 5500 15650 5 8 1 1 0 0 1 pinnumber=80 T 5500 15650 5 8 0 1 0 0 1 pinseq=80 T 5300 15650 9 10 0 1 0 6 1 pintype=pas } P 5700 15800 5400 15800 1 0 0 { T 5350 15800 9 10 1 1 0 7 1 pinlabel=P0[4]/I2SRX_CLK/RD2/CAP2[0] T 5500 15850 5 8 1 1 0 0 1 pinnumber=81 T 5500 15850 5 8 0 1 0 0 1 pinseq=81 T 5300 15850 9 10 0 1 0 6 1 pintype=pas } P 5700 600 5400 600 1 0 0 { T 5350 600 9 10 1 1 0 7 1 pinlabel=P4[28]/RX_MCLK/MAT2[0]/TXD3 T 5500 650 5 8 1 1 0 0 1 pinnumber=82 T 5500 650 5 8 0 1 0 0 1 pinseq=82 T 5300 650 9 10 0 1 0 6 1 pintype=pas } P 0 10600 300 10600 1 0 0 { T 350 10600 9 10 1 1 0 1 1 pinlabel=VSS T 200 10650 5 8 1 1 0 6 1 pinnumber=83 T 200 10650 5 8 0 1 0 6 1 pinseq=83 T 200 10650 9 10 0 1 0 6 1 pintype=pas } P 0 14600 300 14600 1 0 0 { T 350 14600 9 10 1 1 0 1 1 pinlabel=VDD(REG)(3V3) T 200 14650 5 8 1 1 0 6 1 pinnumber=84 T 200 14650 5 8 0 1 0 6 1 pinseq=84 T 200 14650 9 10 0 1 0 6 1 pintype=pas } P 5700 400 5400 400 1 0 0 { T 5350 400 9 10 1 1 0 7 1 pinlabel=P4[29]/TX_MCLK/MAT2[1]/RXD3 T 5500 450 5 8 1 1 0 0 1 pinnumber=85 T 5500 450 5 8 0 1 0 0 1 pinseq=85 T 5300 450 9 10 0 1 0 6 1 pintype=pas } P 5700 8600 5400 8600 1 0 0 { T 5350 8600 9 10 1 1 0 7 1 pinlabel=P1[17]/ENET_MDIO T 5500 8650 5 8 1 1 0 0 1 pinnumber=86 T 5500 8650 5 8 0 1 0 0 1 pinseq=86 T 5300 8650 9 10 0 1 0 6 1 pintype=pas } P 5700 8800 5400 8800 1 0 0 { T 5350 8800 9 10 1 1 0 7 1 pinlabel=P1[16]/ENET_MDC T 5500 8850 5 8 1 1 0 0 1 pinnumber=87 T 5500 8850 5 8 0 1 0 0 1 pinseq=87 T 5300 8850 9 10 0 1 0 6 1 pintype=pas } P 5700 9000 5400 9000 1 0 0 { T 5350 9000 9 10 1 1 0 7 1 pinlabel=P1[15]/ENET_REF_CLK T 5500 9050 5 8 1 1 0 0 1 pinnumber=88 T 5500 9050 5 8 0 1 0 0 1 pinseq=88 T 5300 9050 9 10 0 1 0 6 1 pintype=pas } P 5700 9200 5400 9200 1 0 0 { T 5350 9200 9 10 1 1 0 7 1 pinlabel=P1[14]/ENET_RX_ER T 5500 9250 5 8 1 1 0 0 1 pinnumber=89 T 5500 9250 5 8 0 1 0 0 1 pinseq=89 T 5300 9250 9 10 0 1 0 6 1 pintype=pas } P 5700 9400 5400 9400 1 0 0 { T 5350 9400 9 10 1 1 0 7 1 pinlabel=P1[10]/ENET_RXD1 T 5500 9450 5 8 1 1 0 0 1 pinnumber=90 T 5500 9450 5 8 0 1 0 0 1 pinseq=90 T 5300 9450 9 10 0 1 0 6 1 pintype=pas } P 5700 9600 5400 9600 1 0 0 { T 5350 9600 9 10 1 1 0 7 1 pinlabel=P1[9]/ENET_RXD0 T 5500 9650 5 8 1 1 0 0 1 pinnumber=91 T 5500 9650 5 8 0 1 0 0 1 pinseq=91 T 5300 9650 9 10 0 1 0 6 1 pintype=pas } P 5700 9800 5400 9800 1 0 0 { T 5350 9800 9 10 1 1 0 7 1 pinlabel=P1[8]/ENET_CRS T 5500 9850 5 8 1 1 0 0 1 pinnumber=92 T 5500 9850 5 8 0 1 0 0 1 pinseq=92 T 5300 9850 9 10 0 1 0 6 1 pintype=pas } P 5700 10000 5400 10000 1 0 0 { T 5350 10000 9 10 1 1 0 7 1 pinlabel=P1[4]/ENET_TX_EN T 5500 10050 5 8 1 1 0 0 1 pinnumber=93 T 5500 10050 5 8 0 1 0 0 1 pinseq=93 T 5300 10050 9 10 0 1 0 6 1 pintype=pas } P 5700 10200 5400 10200 1 0 0 { T 5350 10200 9 10 1 1 0 7 1 pinlabel=P1[1]/ENET_TXD1 T 5500 10250 5 8 1 1 0 0 1 pinnumber=94 T 5500 10250 5 8 0 1 0 0 1 pinseq=94 T 5300 10250 9 10 0 1 0 6 1 pintype=pas } P 5700 10400 5400 10400 1 0 0 { T 5350 10400 9 10 1 1 0 7 1 pinlabel=P1[0]/ENET_TXD0 T 5500 10450 5 8 1 1 0 0 1 pinnumber=95 T 5500 10450 5 8 0 1 0 0 1 pinseq=95 T 5300 10450 9 10 0 1 0 6 1 pintype=pas } P 0 14200 300 14200 1 0 0 { T 350 14200 9 10 1 1 0 1 1 pinlabel=VDD(3V3) T 200 14250 5 8 1 1 0 6 1 pinnumber=96 T 200 14250 5 8 0 1 0 6 1 pinseq=96 T 200 14250 9 10 0 1 0 6 1 pintype=pas } P 0 10200 300 10200 1 0 0 { T 350 10200 9 10 1 1 0 1 1 pinlabel=VSS T 200 10250 5 8 1 1 0 6 1 pinnumber=97 T 200 10250 5 8 0 1 0 6 1 pinseq=97 T 200 10250 9 10 0 1 0 6 1 pintype=pas } P 5700 16200 5400 16200 1 0 0 { T 5350 16200 9 10 1 1 0 7 1 pinlabel=P0[2]/TXD0/AD0[7] T 5500 16250 5 8 1 1 0 0 1 pinnumber=98 T 5500 16250 5 8 0 1 0 0 1 pinseq=98 T 5300 16250 9 10 0 1 0 6 1 pintype=pas } P 5700 16000 5400 16000 1 0 0 { T 5350 16000 9 10 1 1 0 7 1 pinlabel=P0[3]/RXD0/AD0[6] T 5500 16050 5 8 1 1 0 0 1 pinnumber=99 T 5500 16050 5 8 0 1 0 0 1 pinseq=99 T 5300 16050 9 10 0 1 0 6 1 pintype=pas } P 0 6600 300 6600 1 0 0 { T 350 6600 9 10 1 1 0 1 1 pinlabel=RTCK T 200 6650 5 8 1 1 0 6 1 pinnumber=100 T 200 6650 5 8 0 1 0 6 1 pinseq=100 T 200 6650 9 10 0 1 0 6 1 pintype=pas } T 5200 17100 8 10 1 1 0 0 1 refdes=U? T 300 17100 8 10 1 1 0 0 1 device=LPC176x T 300 17300 8 10 0 0 0 0 1 footprint=LQFP100_14 T 300 17900 8 10 0 0 0 0 1 author=Piotr Wiszowaty pwiszowaty458@gmail.com T 300 17700 8 10 0 0 0 0 1 dist-license=GPL 2 T 300 17500 8 10 0 0 0 0 1 use-license=unlimited