v 20100214 2 T 2100 9000 8 10 0 0 0 0 1 device=atmega16 T 2100 8800 8 10 0 0 0 0 1 documentation=http://www.atmel.com/dyn/resources/prod_documents/doc2466.pdf T 2100 8600 8 10 0 0 0 0 1 footprint=atmega16 T 2100 8400 8 10 0 0 0 0 1 author=Max Christian Pohle T 2100 8200 8 10 1 1 0 0 1 refdes=U? T 3700 8200 9 10 1 0 0 0 1 ATMega16 P 4700 7800 5000 7800 1 0 1 { T 4900 7800 5 8 1 1 0 6 1 pinnumber=40 T 5100 7800 5 8 0 0 0 0 1 pinseq=40 T 4400 7800 9 8 1 1 0 6 1 pinlabel=(ADC0) PA0 T 5900 7800 5 8 0 0 0 0 1 pintype=io } B 2100 0 2400 8100 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 P 4700 7400 5000 7400 1 0 1 { T 4900 7400 5 8 1 1 0 6 1 pinnumber=39 T 5100 7400 5 8 0 0 0 0 1 pinseq=39 T 4400 7400 9 8 1 1 0 6 1 pinlabel=(ADC1) PA1 T 5900 7400 5 8 0 0 0 0 1 pintype=io } P 4700 7000 5000 7000 1 0 1 { T 4900 7000 5 8 1 1 0 6 1 pinnumber=38 T 5100 7000 5 8 0 0 0 0 1 pinseq=38 T 4400 7000 9 8 1 1 0 6 1 pinlabel=(ADC2) PA2 T 5900 7000 5 8 0 0 0 0 1 pintype=io } P 4700 6600 5000 6600 1 0 1 { T 4900 6600 5 8 1 1 0 6 1 pinnumber=37 T 5100 6600 5 8 0 0 0 0 1 pinseq=37 T 4400 6600 9 8 1 1 0 6 1 pinlabel=(ADC3) PA3 T 5900 6600 5 8 0 0 0 0 1 pintype=io } P 4700 6200 5000 6200 1 0 1 { T 4900 6200 5 8 1 1 0 6 1 pinnumber=36 T 5100 6200 5 8 0 0 0 0 1 pinseq=36 T 4400 6200 9 8 1 1 0 6 1 pinlabel=(ADC4) PA4 T 5900 6200 5 8 0 0 0 0 1 pintype=io } P 4700 5800 5000 5800 1 0 1 { T 4900 5800 5 8 1 1 0 6 1 pinnumber=35 T 5100 5800 5 8 0 0 0 0 1 pinseq=35 T 4400 5800 9 8 1 1 0 6 1 pinlabel=(ADC5) PA5 T 5900 5800 5 8 0 0 0 0 1 pintype=io } P 4700 5400 5000 5400 1 0 1 { T 4900 5400 5 8 1 1 0 6 1 pinnumber=34 T 5100 5400 5 8 0 0 0 0 1 pinseq=34 T 4400 5400 9 8 1 1 0 6 1 pinlabel=(ADC6) PA6 T 5900 5400 5 8 0 0 0 0 1 pintype=io } P 4700 5000 5000 5000 1 0 1 { T 4900 5000 5 8 1 1 0 6 1 pinnumber=33 T 5100 5000 5 8 0 0 0 0 1 pinseq=33 T 4400 5000 9 8 1 1 0 6 1 pinlabel=(ADC7) PA7 T 5900 5000 5 8 0 0 0 0 1 pintype=io } P 4700 4600 5000 4600 1 0 1 { T 4900 4600 5 8 1 1 0 6 1 pinnumber=32 T 5100 4600 5 8 0 0 0 0 1 pinseq=32 T 4400 4600 9 8 1 1 0 6 1 pinlabel=AREF T 5900 4600 5 8 0 0 0 0 1 pintype=io } P 4700 4200 5000 4200 1 0 1 { T 4900 4200 5 8 1 1 0 6 1 pinnumber=31 T 5100 4200 5 8 0 0 0 0 1 pinseq=31 T 4400 4200 9 8 1 1 0 6 1 pinlabel=GND T 5900 4200 5 8 0 0 0 0 1 pintype=io } P 4700 3800 5000 3800 1 0 1 { T 4900 3800 5 8 1 1 0 6 1 pinnumber=30 T 5100 3800 5 8 0 0 0 0 1 pinseq=30 T 4400 3800 9 8 1 1 0 6 1 pinlabel=AVCC T 5900 3800 5 8 0 0 0 0 1 pintype=io } P 4700 3400 5000 3400 1 0 1 { T 4900 3400 5 8 1 1 0 6 1 pinnumber=29 T 5100 3400 5 8 0 0 0 0 1 pinseq=29 T 4400 3400 9 8 1 1 0 6 1 pinlabel=(TOSC2) PC7 T 5900 3400 5 8 0 0 0 0 1 pintype=io } P 4700 3000 5000 3000 1 0 1 { T 4900 3000 5 8 1 1 0 6 1 pinnumber=28 T 5100 3000 5 8 0 0 0 0 1 pinseq=28 T 4400 3000 9 8 1 1 0 6 1 pinlabel=(TOSC1) PC6 T 5900 3000 5 8 0 0 0 0 1 pintype=io } P 4700 2600 5000 2600 1 0 1 { T 4900 2600 5 8 1 1 0 6 1 pinnumber=27 T 5100 2600 5 8 0 0 0 0 1 pinseq=27 T 4400 2600 9 8 1 1 0 6 1 pinlabel=(TDI) PC5 T 5900 2600 5 8 0 0 0 0 1 pintype=io } P 4700 2200 5000 2200 1 0 1 { T 4900 2200 5 8 1 1 0 6 1 pinnumber=26 T 5100 2200 5 8 0 0 0 0 1 pinseq=26 T 4400 2200 9 8 1 1 0 6 1 pinlabel=(TDO) PC4 T 5900 2200 5 8 0 0 0 0 1 pintype=io } P 4700 1800 5000 1800 1 0 1 { T 4900 1800 5 8 1 1 0 6 1 pinnumber=25 T 5100 1800 5 8 0 0 0 0 1 pinseq=25 T 4400 1800 9 8 1 1 0 6 1 pinlabel=(TMS) PC3 T 5900 1800 5 8 0 0 0 0 1 pintype=io } P 4700 1400 5000 1400 1 0 1 { T 4900 1400 5 8 1 1 0 6 1 pinnumber=24 T 5100 1400 5 8 0 0 0 0 1 pinseq=24 T 4400 1400 9 8 1 1 0 6 1 pinlabel=(TCK) PC2 T 5900 1400 5 8 0 0 0 0 1 pintype=io } P 4700 1000 5000 1000 1 0 1 { T 4900 1000 5 8 1 1 0 6 1 pinnumber=23 T 5100 1000 5 8 0 0 0 0 1 pinseq=23 T 4400 1000 9 8 1 1 0 6 1 pinlabel=(SDA) PC1 T 5900 1000 5 8 0 0 0 0 1 pintype=io } P 4700 600 5000 600 1 0 1 { T 4900 600 5 8 1 1 0 6 1 pinnumber=22 T 5100 600 5 8 0 0 0 0 1 pinseq=22 T 4400 600 9 8 1 1 0 6 1 pinlabel=(SCL) PC0 T 5900 600 5 8 0 0 0 0 1 pintype=io } P 4700 200 5000 200 1 0 1 { T 4900 200 5 8 1 1 0 6 1 pinnumber=21 T 5100 200 5 8 0 0 0 0 1 pinseq=21 T 4400 200 9 8 1 1 0 6 1 pinlabel=(OC2) PD7 T 5900 200 5 8 0 0 0 0 1 pintype=io } P 1900 200 1600 200 1 0 1 { T 1700 200 5 8 1 1 0 0 1 pinnumber=20 T 1500 300 5 8 0 0 180 0 1 pinseq=20 T 2155 195 9 8 1 1 0 0 1 pinlabel=PD6 (ICP) T 700 300 5 8 0 0 180 0 1 pintype=io } P 1900 600 1600 600 1 0 1 { T 1700 600 5 8 1 1 0 0 1 pinnumber=19 T 1500 700 5 8 0 0 180 0 1 pinseq=19 T 2155 595 9 8 1 1 0 0 1 pinlabel=PD5 (OC1A) T 700 700 5 8 0 0 180 0 1 pintype=io } P 1900 1000 1600 1000 1 0 1 { T 1700 1000 5 8 1 1 0 0 1 pinnumber=18 T 1500 1100 5 8 0 0 180 0 1 pinseq=18 T 2155 995 9 8 1 1 0 0 1 pinlabel=PC4 (PC1B) T 700 1100 5 8 0 0 180 0 1 pintype=io } P 1900 1400 1600 1400 1 0 1 { T 1700 1400 5 8 1 1 0 0 1 pinnumber=17 T 1500 1500 5 8 0 0 180 0 1 pinseq=17 T 2155 1395 9 8 1 1 0 0 1 pinlabel=PD3 (INT1) T 700 1500 5 8 0 0 180 0 1 pintype=io } P 1900 1800 1600 1800 1 0 1 { T 1700 1800 5 8 1 1 0 0 1 pinnumber=16 T 1500 1900 5 8 0 0 180 0 1 pinseq=16 T 2155 1795 9 8 1 1 0 0 1 pinlabel=PD2 (INT0) T 700 1900 5 8 0 0 180 0 1 pintype=io } P 1900 2200 1600 2200 1 0 1 { T 1700 2200 5 8 1 1 0 0 1 pinnumber=15 T 1500 2300 5 8 0 0 180 0 1 pinseq=15 T 2155 2195 9 8 1 1 0 0 1 pinlabel=PD1 (TXD) T 700 2300 5 8 0 0 180 0 1 pintype=io } P 1900 2600 1600 2600 1 0 1 { T 1700 2600 5 8 1 1 0 0 1 pinnumber=14 T 1500 2700 5 8 0 0 180 0 1 pinseq=14 T 2155 2595 9 8 1 1 0 0 1 pinlabel=PD0 (RXD) T 700 2700 5 8 0 0 180 0 1 pintype=io } P 1900 3000 1600 3000 1 0 1 { T 1700 3000 5 8 1 1 0 0 1 pinnumber=13 T 1500 3100 5 8 0 0 180 0 1 pinseq=13 T 2155 2995 9 8 1 1 0 0 1 pinlabel=XTAL1 T 700 3100 5 8 0 0 180 0 1 pintype=in } P 1900 3400 1600 3400 1 0 1 { T 1700 3400 5 8 1 1 0 0 1 pinnumber=12 T 1500 3500 5 8 0 0 180 0 1 pinseq=12 T 2155 3395 9 8 1 1 0 0 1 pinlabel=XTAL2 T 700 3500 5 8 0 0 180 0 1 pintype=out } P 1900 3800 1600 3800 1 0 1 { T 1700 3800 5 8 1 1 0 0 1 pinnumber=11 T 1500 3900 5 8 0 0 180 0 1 pinseq=11 T 2155 3795 9 8 1 1 0 0 1 pinlabel=GND T 700 3900 5 8 0 0 180 0 1 pintype=out } P 1900 4200 1600 4200 1 0 1 { T 1700 4200 5 8 1 1 0 0 1 pinnumber=10 T 1500 4300 5 8 0 0 180 0 1 pinseq=10 T 2155 4195 9 8 1 1 0 0 1 pinlabel=VCC T 700 4300 5 8 0 0 180 0 1 pintype=in } P 1900 4600 1600 4600 1 0 1 { T 1700 4600 5 8 1 1 0 0 1 pinnumber=9 T 1500 4700 5 8 0 0 180 0 1 pinseq=9 T 2155 4595 9 8 1 1 0 0 1 pinlabel=RESET T 700 4700 5 8 0 0 180 0 1 pintype=in } P 1900 5000 1600 5000 1 0 1 { T 1700 5000 5 8 1 1 0 0 1 pinnumber=8 T 1500 5100 5 8 0 0 180 0 1 pinseq=8 T 2155 4995 9 8 1 1 0 0 1 pinlabel=PB7 (SCK) T 700 5100 5 8 0 0 180 0 1 pintype=io } P 1900 5400 1600 5400 1 0 1 { T 1700 5400 5 8 1 1 0 0 1 pinnumber=7 T 1500 5500 5 8 0 0 180 0 1 pinseq=7 T 2155 5395 9 8 1 1 0 0 1 pinlabel=PB6 (MISO) T 700 5500 5 8 0 0 180 0 1 pintype=io } P 1900 5800 1600 5800 1 0 1 { T 1700 5800 5 8 1 1 0 0 1 pinnumber=6 T 1500 5900 5 8 0 0 180 0 1 pinseq=6 T 2155 5795 9 8 1 1 0 0 1 pinlabel=PB5 (MOSI) T 700 5900 5 8 0 0 180 0 1 pintype=io } P 1900 6200 1600 6200 1 0 1 { T 1700 6200 5 8 1 1 0 0 1 pinnumber=5 T 1500 6300 5 8 0 0 180 0 1 pinseq=5 T 2155 6195 9 8 1 1 0 0 1 pinlabel=PB4 (SS) T 700 6300 5 8 0 0 180 0 1 pintype=io } P 1900 6600 1600 6600 1 0 1 { T 1700 6600 5 8 1 1 0 0 1 pinnumber=4 T 1500 6700 5 8 0 0 180 0 1 pinseq=4 T 2155 6595 9 8 1 1 0 0 1 pinlabel=PB3 (OC0/AIN1) T 700 6700 5 8 0 0 180 0 1 pintype=io } P 1900 7000 1600 7000 1 0 1 { T 1700 7000 5 8 1 1 0 0 1 pinnumber=3 T 1500 7100 5 8 0 0 180 0 1 pinseq=3 T 2155 6995 9 8 1 1 0 0 1 pinlabel=PB2 (INT2/AIN0) T 700 7100 5 8 0 0 180 0 1 pintype=io } P 1900 7400 1600 7400 1 0 1 { T 1700 7400 5 8 1 1 0 0 1 pinnumber=2 T 1500 7500 5 8 0 0 180 0 1 pinseq=2 T 2155 7395 9 8 1 1 0 0 1 pinlabel=PB1 (T1) T 700 7500 5 8 0 0 180 0 1 pintype=io } P 1900 7800 1600 7800 1 0 1 { T 1700 7800 5 8 1 1 0 0 1 pinnumber=1 T 1500 7900 5 8 0 0 180 0 1 pinseq=1 T 2155 7795 9 8 1 1 0 0 1 pinlabel=PB0 (XCK/T0) T 700 7900 5 8 0 0 180 0 1 pintype=io } V 4600 200 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 4600 600 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 4600 1000 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 4600 1400 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 4600 1800 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 4600 2200 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 4600 2600 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 4600 3000 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 4600 3400 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 4600 3800 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 4600 4200 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 4600 4600 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 4600 5000 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 4600 5400 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 4600 5800 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 4600 6200 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 4600 6600 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 4600 7000 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 4600 7400 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 4600 7800 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 2000 7800 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 2000 7400 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 2000 7000 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 2000 6600 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 2000 6200 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 2000 5800 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 2000 5400 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 2000 5000 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 2000 4600 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 2000 4200 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 2000 3800 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 2000 3400 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 2000 3000 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 2000 2600 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 2000 2200 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 2000 1800 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 2000 1400 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 2000 1000 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 2000 600 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 2000 200 100 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1