v 20110619 2 T 200 4300 5 8 0 0 0 0 1 description=4 NAND gates with 2 inputs each T 200 3900 5 8 0 0 0 0 1 comment=use 74_pwr.sym for power supply T 200 4100 5 8 0 0 0 0 1 documentation=http://www-s.ti.com/sc/ds/sn74hc00.pdf T 200 3100 5 8 0 0 0 0 1 author=Kai-Martin Knaak kmk@lilalaser.de T 200 2900 5 8 0 0 0 0 1 dist-license=GPL 3, see http://www.gnu.org/licenses/gpl-3.0.txt T 200 2700 5 8 0 0 0 0 1 use-license=free, no restrictions T 200 2300 5 8 0 0 0 0 1 numslots=4 T 200 2100 5 8 0 0 0 0 1 slotdef=1:1,2,3 T 200 1900 5 8 0 0 0 0 1 slotdef=2:4,5,6 T 200 1700 5 8 0 0 0 0 1 slotdef=3:9,10,8 T 200 1500 5 8 0 0 0 0 1 slotdef=4:12,13,11 T 200 1100 8 10 1 1 0 0 1 refdes=U? T 200 900 8 10 1 1 0 0 1 value=74HC00 T 200 700 8 8 1 1 0 0 1 footprint=SO14 T 700 700 8 8 1 0 0 0 1 slot=1 P 800 300 900 300 1 0 1 { T 900 350 5 8 1 1 0 3 1 pinnumber=3 T 900 250 5 8 0 1 0 5 1 pinseq=3 T 750 300 9 8 0 1 0 6 1 pinlabel=Y T 750 300 5 8 0 1 0 8 1 pintype=out } P 100 100 0 100 1 0 1 { T 50 150 5 8 1 1 0 6 1 pinnumber=2 T 100 -50 5 8 0 1 0 6 1 pinseq=2 T 150 100 9 8 0 1 0 0 1 pinlabel=B T 150 100 5 8 0 1 0 2 1 pintype=in } P 100 500 0 500 1 0 1 { T 50 550 5 8 1 1 0 6 1 pinnumber=1 T 100 350 5 8 0 1 0 6 1 pinseq=1 T 150 400 9 8 0 1 0 0 1 pinlabel=A T 150 400 5 8 0 1 0 2 1 pintype=in } L 100 0 100 600 3 10 0 0 -1 -1 L 100 600 500 600 3 10 0 0 -1 -1 L 100 0 500 0 3 10 0 0 -1 -1 A 500 300 300 270 180 3 10 0 0 -1 -1 T 420 300 9 11 1 0 0 4 1 NAND V 800 300 40 6 0 0 0 -1 -1 1 -1 -1 -1 -1 -1 T 200 3300 5 8 0 0 0 0 1 symversion=1.0 T 200 3700 5 8 0 0 0 0 1 footprints=SO14, DIP14 T 200 3500 5 8 0 0 0 0 1 values=74HC00, 74LS00, 74AC00, 74F00, 74ALS00