* Copyright (C) 2010 John P. Doty jpd@noqsi.com * * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * * the Free Software Foundation; either version 2 of the License, or * * (at your option) any later version. * * * * This program is distributed in the hope that it will be useful, * * but WITHOUT ANY WARRANTY; without even the implied warranty of * * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * * GNU General Public License for more details. * * * * You should have received a copy of the GNU General Public License * * along with this program; if not, write to the * * Free Software Foundation, Inc., * * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * * * Model for CA3080 originally created 7/23/92 jpd * Modified for ngspice and GPL publication 4/24/2010 jpd * Netlist modified from a Workview drawing * Transistor models generated by applying Pspice/Parts to * the specs of a CA3096 array, assumed * to have the same transistors in it. Simulation by Pspice matched * physical circuit well, but modifications needed for ngspice may cause * degradation: I haven't checked. * connections: non-inverting input * | inverting input * | | positive power supply * | | | negative power supply * | | | | output * | | | | | Iabc .subckt CA3080 N28 N1 N8 N13 N30 N11 Q1 N11 N11 N13 N13 VERTNPN Q2 N1N22 N1N17 N1N15 N13 LATPNP Q3 N1N22 N1N13 N1N17 N13 LATPNP D1 N1N13 N1N17 DND Q4 N1N52 N11 N13 N13 VERTNPN Q5 N1N32 N28 N1N52 N13 VERTNPN Q6 N30 N1N32 N1N34 N13 LATPNP D2 N1N32 N1N34 DND Q7 N30 N1N34 N1N36 N13 LATPNP Q8 N1N36 N1N36 N8 N13 LATPNP Q9 N1N32 N1N36 N8 N13 LATPNP Q10 N1N13 N1 N1N52 N13 VERTNPN Q11 N1N22 N1N44 N13 N13 VERTNPN Q12 N1N44 N1N44 N13 N13 VERTNPN Q13 N30 N1N22 N1N44 N13 VERTNPN Q14 N1N13 N1N15 N8 N13 LATPNP Q15 N1N15 N1N15 N8 N13 LATPNP .ENDS * Nondescript diode model * .MODEL DND D(IS=2P RS=5 BV=40 CJO=3P TT=6N) * rcapnp model created using Parts version 5.1 on 07/21/92 at 11:56 * substrate capacitance added 7/21/92 jpd .model latpnp PNP(level=1 + Is=50f Xti=3 Eg=1.11 Vaf=80 Bf=100 Ise=130f Ne=1.5 Ikf=1m + Xtb=1.5 Br=1 Isc=0 Nc=2 Ikr=0 Rc=0 Cjc=4p Mjc=.3333 + Vjc=.75 Fc=.5 Cje=1.4p Mje=.3333 Vje=.75 Tr=500n Tf=23n Itf=.1 + Xtf=1 Vtf=10 Cjs=5.5p Mjs=.3333 Vjs=.75) * rcanpn model created using Parts version 5.1 on 07/21/92 at 12:01 * substrate capacitance added 7/21/92 jpd .model vertnpn NPN(level=1 + Is=21.48f Xti=3 Eg=1.11 Vaf=80 Bf=550 Ise=50f Ne=1.5 + Ikf=10m Xtb=1.5 Br=.1 Isc=10f Nc=2 Ikr=3m Rc=10 Cjc=800f + Mjc=.3333 Vjc=.75 Fc=.5 Cje=1.3p Mje=.3333 Vje=.75 Tr=30n + Tf=400p Itf=30m Xtf=1 Vtf=10 Cjs=5.8p Mjs=.3333 Vjs=.75) ******************************* * Begin .SUBCKT model * * spice-sdb ver 4.28.2007 * ******************************* .SUBCKT opbw 2 3 5 6 4 *============== Begin SPICE netlist of main design ============ * begin vcvs expansion, e E1 4 0 1 0 1 Isense_E1 1 0 dc 0 IOut_E1 4 0 dc 0 * end vcvs expansion Cp 5 6 1p Cbw 1 0 1u * begin vccs expansion, g G1 1 0 2 3 -1 IMeasure_G1 2 3 dc 0 * end vccs expansion .ends opbw ******************************* ******************************* * Begin .SUBCKT model * * spice-sdb ver 4.28.2007 * ******************************* .SUBCKT opgain 2 3 4 5 1 *============== Begin SPICE netlist of main design ============ * begin vcvs expansion, e E1 1 0 2 3 1000 Isense_E1 2 3 dc 0 IOut_E1 1 0 dc 0 * end vcvs expansion Cp 4 5 1p .ends opgain ******************************* ******************************* * Begin .SUBCKT model * * spice-sdb ver 4.28.2007 * ******************************* .SUBCKT opmediocre 2 3 4 5 1 *============== Begin SPICE netlist of main design ============ R1 8 1 100 R2 5 1 10k C1 7 5 50p Q1 4 7 8 5 vertnpn Q2 5 7 8 5 latpnp I1 6 4 DC 0.05mA X1 2 3 4 5 7 6 CA3080 .ends opmediocre *******************************