v 20080127 1 L 400 600 400 200 3 0 0 0 -1 -1 T 400 950 5 10 0 0 0 0 1 device=2N4091 L 400 500 600 500 3 0 0 0 -1 -1 P 600 500 600 800 1 0 1 { T 650 600 5 8 1 1 0 0 1 pinnumber=1 T 1050 600 5 8 0 0 0 2 1 pinseq=1 T 550 700 9 8 1 1 0 5 1 pinlabel=D T 1200 200 5 8 0 1 0 5 1 pintype=pas } L 400 300 600 300 3 0 0 0 -1 -1 P 600 300 600 0 1 0 1 { T 650 100 5 8 1 1 0 0 1 pinnumber=2 T 950 100 5 8 0 0 0 2 1 pinseq=2 T 550 100 9 8 1 1 0 3 1 pinlabel=S T 1200 600 5 8 0 1 0 3 1 pintype=pas } L 300 300 400 300 3 0 0 0 -1 -1 L 350 350 400 300 3 0 0 0 -1 -1 L 400 300 350 250 3 0 0 0 -1 -1 P 300 300 0 300 1 0 1 { T 300 150 5 8 1 1 0 6 1 pinnumber=3 T 600 850 5 8 0 0 0 8 1 pinseq=3 T 200 350 9 8 1 1 0 0 1 pinlabel=G T 50 700 5 8 0 1 0 2 1 pintype=pas } T 650 400 8 10 1 1 0 0 1 refdes=Q? T 400 1350 5 10 0 0 0 0 1 footprint=TO92 T 400 1550 5 10 0 0 0 0 1 description=n-channel JFET T 400 1750 5 10 0 0 0 0 1 numslots=0 T 400 1150 5 10 0 0 0 0 1 documentation=http://www.fairchildsemi.com/ds/PN/PN4091.pdf T 392 1972 8 10 1 1 0 0 1 author=David Griffith