v 20100113 1 P 1900 1700 1600 1700 1 0 0 { T 1700 1750 5 8 1 1 0 0 1 pinnumber=8 T 1700 1650 5 8 0 1 0 2 1 pinseq=8 T 1550 1700 9 8 1 1 0 6 1 pinlabel=VCC T 1550 1700 5 8 0 1 0 8 1 pintype=pwr } P 1900 1300 1600 1300 1 0 0 { T 1700 1350 5 8 1 1 0 0 1 pinnumber=7 T 1700 1250 5 8 0 1 0 2 1 pinseq=7 T 1550 1300 9 8 1 1 0 6 1 pinlabel=HOLD T 1550 1300 5 8 0 1 0 8 1 pintype=io } P 1900 900 1600 900 1 0 0 { T 1700 950 5 8 1 1 0 0 1 pinnumber=6 T 1700 850 5 8 0 1 0 2 1 pinseq=6 T 1550 900 9 8 1 1 0 6 1 pinlabel=SCK T 1550 900 5 8 0 1 0 8 1 pintype=io } P 1900 500 1600 500 1 0 0 { T 1700 550 5 8 1 1 0 0 1 pinnumber=5 T 1700 450 5 8 0 1 0 2 1 pinseq=5 T 1550 500 9 8 1 1 0 6 1 pinlabel=SI T 1550 500 5 8 0 1 0 8 1 pintype=io } P 100 1700 400 1700 1 0 0 { T 300 1750 5 8 1 1 0 6 1 pinnumber=1 T 300 1650 5 8 0 1 0 8 1 pinseq=1 T 450 1700 9 8 1 1 0 0 1 pinlabel=CS T 450 1700 5 8 0 1 0 2 1 pintype=io } P 100 1300 400 1300 1 0 0 { T 300 1350 5 8 1 1 0 6 1 pinnumber=2 T 300 1250 5 8 0 1 0 8 1 pinseq=2 T 450 1300 9 8 1 1 0 0 1 pinlabel=SO T 450 1300 5 8 0 1 0 2 1 pintype=io } P 100 900 400 900 1 0 0 { T 300 950 5 8 1 1 0 6 1 pinnumber=3 T 300 850 5 8 0 1 0 8 1 pinseq=3 T 450 900 9 8 1 1 0 0 1 pinlabel=NC T 450 900 5 8 0 1 0 2 1 pintype=io } P 100 500 400 500 1 0 0 { T 300 550 5 8 1 1 0 6 1 pinnumber=4 T 300 450 5 8 0 1 0 8 1 pinseq=4 T 450 500 9 8 1 1 0 0 1 pinlabel=VSS/GND T 450 500 5 8 0 1 0 2 1 pintype=pwr } B 400 100 1200 2000 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 1600 2200 8 10 1 1 0 6 1 refdes=U? T 400 2200 9 10 1 0 0 0 1 23K256 T 400 2400 5 10 0 0 0 0 1 device=23K256 T 400 2600 5 10 0 0 0 0 1 footprint=TSSOP8 T 400 2800 5 10 0 0 0 0 1 author=Conrad Christel aol.com> T 400 3000 5 10 0 0 0 0 1 documentation=http://ww1.microchip.com/downloads/en/DeviceDoc/22100D.pdf T 400 3200 5 10 0 0 0 0 1 description=23K256 SRAM T 400 3400 5 10 0 0 0 0 1 numslots=0 T 400 3600 5 10 0 0 0 0 1 dist-license=GNU Free Document License T 400 3800 5 10 0 0 0 0 1 use-license=GNU Free Document License