v 20110115 2 T 3600 12300 8 10 1 1 0 6 1 refdes=U? T 400 12450 8 10 0 0 0 0 1 device=Atmega64 T 400 12650 8 10 0 0 0 0 1 footprint=TQFP64_10 T 400 12850 8 10 0 0 0 0 1 net=Vcc:26,38,57 T 400 13050 8 10 0 0 0 0 1 net=GND:9,25,41,56 T 400 13250 8 10 0 0 0 0 1 net=AGND:20 T 400 13450 8 10 0 0 0 0 1 net=AVcc:19 P 2900 100 2900 400 1 0 0 { T 2950 200 5 8 1 1 0 0 1 pinnumber=23 T 2950 200 5 8 0 1 0 2 1 pinseq=1 T 2900 450 9 8 1 1 0 3 1 pinlabel=XTAL2 T 2900 600 5 8 0 1 0 3 1 pintype=out } P 2300 100 2300 400 1 0 0 { T 2350 200 5 8 1 1 0 0 1 pinnumber=24 T 2350 200 5 8 0 1 0 2 1 pinseq=2 T 2300 450 9 8 1 1 0 3 1 pinlabel=XTAL1 T 2300 600 5 8 0 1 0 3 1 pintype=in } P 1700 100 1700 400 1 0 0 { T 1750 200 5 8 1 1 0 0 1 pinnumber=18 T 1750 200 5 8 0 1 0 2 1 pinseq=3 T 1700 450 9 8 1 1 0 3 1 pinlabel=TOSC2 T 1700 600 5 8 0 1 0 3 1 pintype=out } P 1100 100 1100 400 1 0 0 { T 1150 200 5 8 1 1 0 0 1 pinnumber=19 T 1150 200 5 8 0 1 0 2 1 pinseq=4 T 1100 450 9 8 1 1 0 3 1 pinlabel=TOSC1 T 1100 600 5 8 0 1 0 3 1 pintype=in } P 100 11800 300 11800 1 0 0 { T 300 11850 5 8 1 1 0 6 1 pinnumber=7 T 300 11750 5 8 0 1 0 8 1 pinseq=7 T 450 11800 9 8 1 1 0 0 1 pinlabel=\_MCLR\_ T 450 11800 5 8 0 1 0 2 1 pintype=in } V 350 11800 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 P 100 1400 400 1400 1 0 0 { T 300 1450 5 8 1 1 0 6 1 pinnumber=6 T 300 1350 5 8 0 1 0 8 1 pinseq=6 T 450 1400 9 8 1 1 0 0 1 pinlabel=RB3/INT3 T 450 1400 5 8 0 1 0 2 1 pintype=in } P 100 2200 400 2200 1 0 0 { T 300 2250 5 8 1 1 0 6 1 pinnumber=4 T 300 2150 5 8 0 1 0 8 1 pinseq=4 T 450 2200 9 8 1 1 0 0 1 pinlabel=RB1/INT1 T 450 2200 5 8 0 1 0 2 1 pintype=io } P 100 2600 400 2600 1 0 0 { T 300 2650 5 8 1 1 0 6 1 pinnumber=3 T 300 2550 5 8 0 1 0 8 1 pinseq=3 T 450 2600 9 8 1 1 0 0 1 pinlabel=RB0/INT0/FLT0 T 450 2600 5 8 0 1 0 2 1 pintype=io } P 100 3000 400 3000 1 0 0 { T 300 3050 5 8 1 1 0 6 1 pinnumber=27 T 300 2950 5 8 0 1 0 8 1 pinseq=27 T 450 3000 9 8 1 1 0 0 1 pinlabel=RA5/AN4 T 450 3000 5 8 0 1 0 2 1 pintype=io } P 100 3400 400 3400 1 0 0 { T 300 3450 5 8 1 1 0 6 1 pinnumber=20 T 300 3350 5 8 0 1 0 8 1 pinseq=20 T 450 3400 9 8 1 1 0 0 1 pinlabel=RA4/T0CKI T 450 3400 5 8 0 1 0 2 1 pintype=io } P 100 3800 400 3800 1 0 0 { T 300 3850 5 8 1 1 0 6 1 pinnumber=21 T 300 3750 5 8 0 1 0 8 1 pinseq=21 T 450 3800 9 8 1 1 0 0 1 pinlabel=RA3/AN3/VREF+ T 450 3800 5 8 0 1 0 2 1 pintype=io } P 100 4200 400 4200 1 0 0 { T 300 4250 5 8 1 1 0 6 1 pinnumber=22 T 300 4150 5 8 0 1 0 8 1 pinseq=22 T 450 4200 9 8 1 1 0 0 1 pinlabel=RA2/AN2/VREF- T 450 4200 5 8 0 1 0 2 1 pintype=io } P 100 4600 400 4600 1 0 0 { T 300 4650 5 8 1 1 0 6 1 pinnumber=23 T 300 4550 5 8 0 1 0 8 1 pinseq=23 T 450 4600 9 8 1 1 0 0 1 pinlabel=RA1/LED0/AN1 T 450 4600 5 8 0 1 0 2 1 pintype=io } P 100 5000 400 5000 1 0 0 { T 300 5050 5 8 1 1 0 6 1 pinnumber=24 T 300 4950 5 8 0 1 0 8 1 pinseq=24 T 450 5000 9 8 1 1 0 0 1 pinlabel=RA0/LEDA/AN0 T 450 5000 5 8 0 1 0 2 1 pintype=io } P 100 5600 400 5600 1 0 0 { T 300 5650 5 8 1 1 0 6 1 pinnumber=55 T 300 5550 5 8 0 1 0 8 1 pinseq=55 T 450 5600 9 8 1 1 0 0 1 pinlabel=VSSPLL T 450 5600 5 8 0 1 0 2 1 pintype=io } P 100 6000 400 6000 1 0 0 { T 300 6050 5 8 1 1 0 6 1 pinnumber=54 T 300 5950 5 8 0 1 0 8 1 pinseq=54 T 450 6000 9 8 1 1 0 0 1 pinlabel=VDDPLL T 450 6000 5 8 0 1 0 2 1 pintype=io } P 100 6400 400 6400 1 0 0 { T 300 6450 5 8 1 1 0 6 1 pinnumber=45 T 300 6350 5 8 0 1 0 8 1 pinseq=45 T 450 6400 9 8 1 1 0 0 1 pinlabel=VSSRX T 450 6400 5 8 0 1 0 2 1 pintype=io } P 100 6800 400 6800 1 0 0 { T 300 6850 5 8 1 1 0 6 1 pinnumber=52 T 300 6750 5 8 0 1 0 8 1 pinseq=52 T 450 6800 9 8 1 1 0 0 1 pinlabel=VSSTX T 450 6800 5 8 0 1 0 2 1 pintype=io } P 100 7200 400 7200 1 0 0 { T 300 7250 5 8 1 1 0 6 1 pinnumber=48 T 300 7150 5 8 0 1 0 8 1 pinseq=48 T 450 7200 9 8 1 1 0 0 1 pinlabel=VDDRX T 450 7200 5 8 0 1 0 2 1 pintype=io } P 100 7600 400 7600 1 0 0 { T 300 7650 5 8 1 1 0 6 1 pinnumber=49 T 300 7550 5 8 0 1 0 8 1 pinseq=49 T 450 7600 9 8 1 1 0 0 1 pinlabel=VDDTX T 450 7600 5 8 0 1 0 2 1 pintype=io } P 100 8000 400 8000 1 0 0 { T 300 8050 5 8 1 1 0 6 1 pinnumber=10 T 300 7950 5 8 0 1 0 8 1 pinseq=10 T 450 8000 9 8 1 1 0 0 1 pinlabel=VDDCORE/VCAP T 450 8000 5 8 0 1 0 2 1 pintype=out } P 100 8400 400 8400 1 0 0 { T 300 8450 5 8 1 1 0 6 1 pinnumber=53 T 300 8350 5 8 0 1 0 8 1 pinseq=53 T 450 8400 9 8 1 1 0 0 1 pinlabel=RBIAS T 450 8400 5 8 0 1 0 2 1 pintype=out } P 100 8900 400 8900 1 0 0 { T 300 8950 5 8 1 1 0 6 1 pinnumber=51 T 300 8850 5 8 0 1 0 8 1 pinseq=51 T 450 8900 9 8 1 1 0 0 1 pinlabel=TPOUT+ T 450 8900 5 8 0 1 0 2 1 pintype=out } P 100 9300 400 9300 1 0 0 { T 300 9350 5 8 1 1 0 6 1 pinnumber=50 T 300 9250 5 8 0 1 0 8 1 pinseq=50 T 450 9300 9 8 1 1 0 0 1 pinlabel=TPOUT- T 450 9300 5 8 0 1 0 2 1 pintype=out } P 100 9700 400 9700 1 0 0 { T 300 9750 5 8 1 1 0 6 1 pinnumber=47 T 300 9650 5 8 0 1 0 8 1 pinseq=47 T 450 9700 9 8 1 1 0 0 1 pinlabel=TPIN+ T 450 9700 5 8 0 1 0 2 1 pintype=in } P 100 10100 400 10100 1 0 0 { T 300 10150 5 8 1 1 0 6 1 pinnumber=46 T 300 10050 5 8 0 1 0 8 1 pinseq=46 T 450 10100 9 8 1 1 0 0 1 pinlabel=TPIN- T 450 10100 5 8 0 1 0 2 1 pintype=in } P 100 10600 400 10600 1 0 0 { T 300 10650 5 8 1 1 0 6 1 pinnumber=40 T 300 10550 5 8 0 1 0 8 1 pinseq=40 T 450 10600 9 8 1 1 0 0 1 pinlabel=OSC2/CLKO T 450 10600 5 8 0 1 0 2 1 pintype=out } P 100 11000 400 11000 1 0 0 { T 300 11050 5 8 1 1 0 6 1 pinnumber=39 T 300 10950 5 8 0 1 0 8 1 pinseq=39 T 450 11000 9 8 1 1 0 0 1 pinlabel=OSC1/CLKI T 450 11000 5 8 0 1 0 2 1 pintype=in } P 100 11400 400 11400 1 0 0 { T 300 11450 5 8 1 1 0 6 1 pinnumber=18 T 300 11350 5 8 0 1 0 8 1 pinseq=18 T 450 11400 9 8 1 1 0 0 1 pinlabel=ENVREG T 450 11400 5 8 0 1 0 2 1 pintype=io } P 100 1800 400 1800 1 0 0 { T 300 1850 5 8 1 1 0 6 1 pinnumber=5 T 300 1750 5 8 0 1 0 8 1 pinseq=5 T 450 1800 9 8 1 1 0 0 1 pinlabel=RB2/INT2 T 450 1800 5 8 0 1 0 2 1 pintype=in } P 3900 800 3700 800 1 0 0 { T 3700 850 5 8 1 1 0 0 1 pinnumber=33 T 3700 750 5 8 0 1 0 2 1 pinseq=32 T 3550 800 9 8 1 1 0 6 1 pinlabel=\_WR\_ T 3550 800 5 8 0 1 0 8 1 pintype=out } V 3650 800 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 P 3900 1800 3600 1800 1 0 0 { T 3700 1850 5 8 1 1 0 0 1 pinnumber=43 T 3700 1750 5 8 0 1 0 2 1 pinseq=43 T 3550 1800 9 8 1 1 0 6 1 pinlabel=RB5/KBI1 T 3550 1800 5 8 0 1 0 8 1 pintype=io } P 3900 2200 3600 2200 1 0 0 { T 3700 2250 5 8 1 1 0 0 1 pinnumber=42 T 3700 2150 5 8 0 1 0 2 1 pinseq=42 T 3550 2200 9 8 1 1 0 6 1 pinlabel=RB6/KBI2/P0C T 3550 2200 5 8 0 1 0 8 1 pintype=io } P 3900 2600 3600 2600 1 0 0 { T 3700 2650 5 8 1 1 0 0 1 pinnumber=37 T 3700 2550 5 8 0 1 0 2 1 pinseq=37 T 3550 2600 9 8 1 1 0 6 1 pinlabel=RB7/KBI2/P0D T 3550 2600 5 8 0 1 0 8 1 pintype=io } P 3900 3000 3600 3000 1 0 0 { T 3700 3050 5 8 1 1 0 0 1 pinnumber=30 T 3700 2950 5 8 0 1 0 2 1 pinseq=37 T 3550 3000 9 8 1 1 0 6 1 pinlabel=RC0/T1OSD/T13CKI T 3550 3000 5 8 0 1 0 8 1 pintype=io } P 3900 3400 3600 3400 1 0 0 { T 3700 3450 5 8 1 1 0 0 1 pinnumber=29 T 3700 3350 5 8 0 1 0 2 1 pinseq=38 T 3550 3400 9 8 1 1 0 6 1 pinlabel=RC1/T1OSI/ECCP2/P2A T 3550 3400 5 8 0 1 0 8 1 pintype=io } P 3900 3800 3600 3800 1 0 0 { T 3700 3850 5 8 1 1 0 0 1 pinnumber=33 T 3700 3750 5 8 0 1 0 2 1 pinseq=39 T 3550 3800 9 8 1 1 0 6 1 pinlabel=RC2/ECCP1/P1A T 3550 3800 5 8 0 1 0 8 1 pintype=io } P 3900 4200 3600 4200 1 0 0 { T 3700 4250 5 8 1 1 0 0 1 pinnumber=34 T 3700 4150 5 8 0 1 0 2 1 pinseq=40 T 3550 4200 9 8 1 1 0 6 1 pinlabel=RC3/SCK1/SCL1 T 3550 4200 5 8 0 1 0 8 1 pintype=io } P 3900 4600 3600 4600 1 0 0 { T 3700 4650 5 8 1 1 0 0 1 pinnumber=35 T 3700 4550 5 8 0 1 0 2 1 pinseq=41 T 3550 4600 9 8 1 1 0 6 1 pinlabel=RC4/SDI1/SDA1 T 3550 4600 5 8 0 1 0 8 1 pintype=io } P 3900 5000 3600 5000 1 0 0 { T 3700 5050 5 8 1 1 0 0 1 pinnumber=36 T 3700 4950 5 8 0 1 0 2 1 pinseq=42 T 3550 5000 9 8 1 1 0 6 1 pinlabel=RC5/SD01 T 3550 5000 5 8 0 1 0 8 1 pintype=io } P 3900 5400 3600 5400 1 0 0 { T 3700 5450 5 8 1 1 0 0 1 pinnumber=31 T 3700 5350 5 8 0 1 0 2 1 pinseq=43 T 3550 5400 9 8 1 1 0 6 1 pinlabel=RC6/TX1/CK1 T 3550 5400 5 8 0 1 0 8 1 pintype=io } P 3900 5800 3600 5800 1 0 0 { T 3700 5850 5 8 1 1 0 0 1 pinnumber=32 T 3700 5750 5 8 0 1 0 2 1 pinseq=44 T 3550 5800 9 8 1 1 0 6 1 pinlabel=RC7/RX1/DT1 T 3550 5800 5 8 0 1 0 8 1 pintype=io } P 3900 6200 3600 6200 1 0 0 { T 3700 6250 5 8 1 1 0 0 1 pinnumber=60 T 3700 6150 5 8 0 1 0 2 1 pinseq=45 T 3550 6200 9 8 1 1 0 6 1 pinlabel=RD0/P1B T 3550 6200 5 8 0 1 0 8 1 pintype=io } P 3900 6600 3600 6600 1 0 0 { T 3700 6650 5 8 1 1 0 0 1 pinnumber=59 T 3700 6550 5 8 0 1 0 2 1 pinseq=46 T 3550 6600 9 8 1 1 0 6 1 pinlabel=RD1/ECCP3/P3A T 3550 6600 5 8 0 1 0 8 1 pintype=io } P 3900 7000 3600 7000 1 0 0 { T 3700 7050 5 8 1 1 0 0 1 pinnumber=58 T 3700 6950 5 8 0 1 0 2 1 pinseq=47 T 3550 7000 9 8 1 1 0 6 1 pinlabel=RD2/CCP4/P3D T 3550 7000 5 8 0 1 0 8 1 pintype=io } P 3900 7400 3600 7400 1 0 0 { T 3700 7450 5 8 1 1 0 0 1 pinnumber=2 T 3700 7350 5 8 0 1 0 2 1 pinseq=48 T 3550 7400 9 8 1 1 0 6 1 pinlabel=RE0/P2D T 3550 7400 5 8 0 1 0 8 1 pintype=io } P 3900 7800 3600 7800 1 0 0 { T 3700 7850 5 8 1 1 0 0 1 pinnumber=1 T 3700 7750 5 8 0 1 0 2 1 pinseq=49 T 3550 7800 9 8 1 1 0 6 1 pinlabel=RE1/P2C T 3550 7800 5 8 0 1 0 8 1 pintype=io } P 3900 8200 3600 8200 1 0 0 { T 3700 8250 5 8 1 1 0 0 1 pinnumber=64 T 3700 8150 5 8 0 1 0 2 1 pinseq=50 T 3550 8200 9 8 1 1 0 6 1 pinlabel=RE2/P2B T 3550 8200 5 8 0 1 0 8 1 pintype=io } P 3900 8600 3600 8600 1 0 0 { T 3700 8650 5 8 1 1 0 0 1 pinnumber=63 T 3700 8550 5 8 0 1 0 2 1 pinseq=51 T 3550 8600 9 8 1 1 0 6 1 pinlabel=RE3/P3C T 3550 8600 5 8 0 1 0 8 1 pintype=io } P 3900 9000 3600 9000 1 0 0 { T 3700 9050 5 8 1 1 0 0 1 pinnumber=62 T 3700 8950 5 8 0 1 0 2 1 pinseq=52 T 3550 9000 9 8 1 1 0 6 1 pinlabel=RE4/P3B T 3550 9000 5 8 0 1 0 8 1 pintype=io } P 3900 9400 3600 9400 1 0 0 { T 3700 9450 5 8 1 1 0 0 1 pinnumber=61 T 3700 9350 5 8 0 1 0 2 1 pinseq=53 T 3550 9400 9 8 1 1 0 6 1 pinlabel=RE5/P1C T 3550 9400 5 8 0 1 0 8 1 pintype=io } P 3900 9800 3600 9800 1 0 0 { T 3700 9850 5 8 1 1 0 0 1 pinnumber=17 T 3700 9750 5 8 0 1 0 2 1 pinseq=54 T 3550 9800 9 8 1 1 0 6 1 pinlabel=RF1/AN6/C2OUT T 3550 9800 5 8 0 1 0 8 1 pintype=io } P 3900 10200 3600 10200 1 0 0 { T 3700 10250 5 8 1 1 0 0 1 pinnumber=16 T 3700 10150 5 8 0 1 0 2 1 pinseq=55 T 3550 10200 9 8 1 1 0 6 1 pinlabel=RF2/AN7/C1OUT T 3550 10200 5 8 0 1 0 8 1 pintype=io } P 3900 10600 3600 10600 1 0 0 { T 3700 10650 5 8 1 1 0 0 1 pinnumber=15 T 3700 10550 5 8 0 1 0 2 1 pinseq=56 T 3550 10600 9 8 1 1 0 6 1 pinlabel=RF3/AN8 T 3550 10600 5 8 0 1 0 8 1 pintype=io } P 3900 11400 3600 11400 1 0 0 { T 3700 11450 5 8 1 1 0 0 1 pinnumber=13 T 3700 11350 5 8 0 1 0 2 1 pinseq=57 T 3550 11400 9 8 1 1 0 6 1 pinlabel=RF5/AN10/CVREF T 3550 11400 5 8 0 1 0 8 1 pintype=io } P 3900 1400 3600 1400 1 0 0 { T 3700 1450 5 8 1 1 0 0 1 pinnumber=44 T 3700 1350 5 8 0 1 0 2 1 pinseq=44 T 3550 1400 9 8 1 1 0 6 1 pinlabel=RB4/KBI0 T 3550 1400 5 8 0 1 0 8 1 pintype=out } B 400 400 3200 11800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 400 13650 8 10 0 0 0 0 1 description=PIC18 uC w/10Mbps Ethernet (Microchip) T 400 13850 8 10 0 0 0 0 1 numslots=0 T 400 14050 8 10 0 0 0 0 1 author=Arno Teigseth T 400 12250 9 10 1 0 0 0 1 PIC18F67J60 P 3900 11000 3600 11000 1 0 0 { T 3700 11050 5 8 1 1 0 0 1 pinnumber=14 T 3700 10950 5 8 0 1 0 2 1 pinseq=56 T 3550 11000 9 8 1 1 0 6 1 pinlabel=RF4/AN9 T 3550 11000 5 8 0 1 0 8 1 pintype=io } P 3900 11800 3600 11800 1 0 0 { T 3700 11850 5 8 1 1 0 0 1 pinnumber=12 T 3700 11750 5 8 0 1 0 2 1 pinseq=57 T 3550 11800 9 8 1 1 0 6 1 pinlabel=RF6/AN11 T 3550 11800 5 8 0 1 0 8 1 pintype=io } P 100 1000 400 1000 1 0 0 { T 300 1050 5 8 1 1 0 6 1 pinnumber=11 T 300 950 5 8 0 1 0 8 1 pinseq=6 T 450 1000 9 8 1 1 0 0 1 pinlabel=RF7/#SS1 T 450 1000 5 8 0 1 0 2 1 pintype=in } P 100 600 400 600 1 0 0 { T 300 650 5 8 1 1 0 6 1 pinnumber=8 T 300 550 5 8 0 1 0 8 1 pinseq=6 T 450 600 9 8 1 1 0 0 1 pinlabel=RG4/CCP5/P1D T 450 600 5 8 0 1 0 2 1 pintype=in }