v 20100214 2 P 600 1000 600 800 1 0 0 { T 500 800 5 8 0 1 0 0 1 pinnumber=1 T 500 900 5 8 0 1 0 0 1 pinseq=1 T 700 900 9 8 0 1 0 4 1 pinlabel=c T 500 700 5 8 0 1 0 0 1 pintype=pas } P 600 200 600 0 1 0 1 { T 500 0 5 8 0 1 0 0 1 pinnumber=3 T 500 100 5 8 0 1 0 0 1 pinseq=3 T 700 100 9 8 0 1 0 4 1 pinlabel=e T 500 200 5 8 0 1 0 0 1 pintype=pas } V 500 501 316 3 15 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 100 1300 5 10 0 0 0 0 1 device=NPN_TRANSISTOR L 600 200 400 400 3 10 0 0 -1 -1 L 600 800 400 600 3 10 0 0 -1 -1 L 400 700 400 300 3 25 0 0 -1 -1 P 0 500 200 500 1 0 0 { T 100 400 5 8 0 1 0 0 1 pinnumber=2 T 0 400 5 8 0 1 0 0 1 pinseq=2 T 100 600 9 8 0 1 0 4 1 pinlabel=b T 200 500 5 8 0 1 0 0 1 pintype=pas } L 400 500 184 500 3 10 0 0 -1 -1 L 600 200 564 272 3 10 0 0 -1 -1 L 600 200 528 236 3 10 0 0 -1 -1 L 528 236 564 272 3 10 0 0 -1 -1 T 200 900 8 10 1 1 0 4 1 refdes=Q? T 100 1100 8 10 0 0 0 0 1 footprint=TO92 T 100 1500 5 10 0 0 0 0 1 numslots=0 T 100 1700 5 10 0 0 0 0 1 description=Generic NPN transistor T 100 2300 5 10 0 0 0 0 1 author=Amand Tihon amand.tihon@alrj.org T 100 2100 5 10 0 0 0 0 1 dist-license=GPL3, http://www.gnu.org/licenses/gpl-3.0.txt T 100 1900 5 10 0 0 0 0 1 use-license=unrestricted